1 /* SPDX-License-Identifier: GPL-2.0-only */
6 #include <cpu/x86/smm.h>
7 #include <device/device.h>
8 #include <southbridge/amd/common/amd_pci_util.h>
10 #include <southbridge/amd/agesa/hudson/smi.h>
12 static const u8 mainboard_picr_data
[0x54] = {
13 0x1F, 0x1f, 0x1f, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x0A, 0xF1, 0x00, 0x00, 0x1F, 0x1F, 0x1F, 0x1F,
14 0x09, 0x1F, 0x1F, 0x0B, 0x1F, 0x0B, 0x1F, 0x1F, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
15 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
16 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
17 0x1F, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
18 0x1F, 0x1F, 0x1F, 0x1F
20 static const u8 mainboard_intr_data
[0x54] = {
21 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x00, 0x00, 0x00, 0x00, 0x1F, 0x1F, 0x1F, 0x1F,
22 0x09, 0x1F, 0x1F, 0x10, 0x1F, 0x10, 0x1F, 0x10, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
23 0x05, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
24 0x12, 0x11, 0x12, 0x11, 0x12, 0x11, 0x12, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
25 0x11, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
26 0x10, 0x11, 0x12, 0x13
29 static void pavilion_cold_boot_init(void)
31 /* Lid SMI is only used in non-ACPI mode; leave it off in S3 resume */
32 hudson_configure_gevent_smi(EC_LID_GEVENT
, SMI_MODE_SMI
, SMI_LVL_LOW
);
33 /* EC is not powered off during S3 sleep */
34 lenovo_g505s_ec_init();
38 static void pirq_setup(void)
40 intr_data_ptr
= mainboard_intr_data
;
41 picr_data_ptr
= mainboard_picr_data
;
44 static void mainboard_enable(struct device
*dev
)
48 hudson_configure_gevent_smi(EC_SMI_GEVENT
, SMI_MODE_SMI
, SMI_LVL_HIGH
);
51 if (!acpi_is_wakeup_s3())
52 pavilion_cold_boot_init();
55 struct chip_operations mainboard_ops
= {
56 .enable_dev
= mainboard_enable
,