payloads/edk2: Disable the CPU Timer Lib unless supported
[coreboot.git] / src / mainboard / lenovo / t420 / early_init.c
blob1be50fd6ed10123dd7dcb08d0807ba00fd0305ed
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <device/pci_ops.h>
4 #include <northbridge/intel/sandybridge/raminit_native.h>
5 #include <southbridge/intel/bd82x6x/pch.h>
6 #include <drivers/lenovo/hybrid_graphics/hybrid_graphics.h>
7 #include <northbridge/intel/sandybridge/sandybridge.h>
8 #include <device/device.h>
10 static void hybrid_graphics_init(void)
12 bool peg, igd;
13 u32 reg32;
15 early_hybrid_graphics(&igd, &peg);
17 if (peg && igd)
18 return;
20 /* Hide disabled devices */
21 reg32 = pci_read_config32(PCI_DEV(0, 0, 0), DEVEN);
22 reg32 &= ~(DEVEN_PEG10 | DEVEN_IGD);
24 if (peg)
25 reg32 |= DEVEN_PEG10;
27 if (igd)
28 reg32 |= DEVEN_IGD;
29 else
30 /* Disable IGD VGA decode, no GTT or GFX stolen */
31 pci_write_config16(PCI_DEV(0, 0, 0), GGC, 2);
33 pci_write_config32(PCI_DEV(0, 0, 0), DEVEN, reg32);
36 // OC3 set in BIOS to port 2-7, OC7 set in BIOS to port 10-13
37 const struct southbridge_usb_port mainboard_usb_ports[] = {
38 { 1, 1, 0 }, /* P0: system port 4, OC0 */
39 { 1, 1, 1 }, /* P1: system port 2 (EHCI debug), OC 1 */
40 { 1, 1, -1 }, /* P2: HALF MINICARD (WLAN) no oc */
41 { 1, 0, -1 }, /* P3: WWAN, no OC */
42 { 1, 0, -1 }, /* P4: smartcard, no OC */
43 { 1, 1, -1 }, /* P5: ExpressCard, no OC */
44 { 0, 0, -1 }, /* P6: empty */
45 { 0, 0, -1 }, /* P7: empty */
46 { 1, 1, 4 }, /* P8: system port 3, OC4*/
47 { 1, 1, 5 }, /* P9: system port 1 (EHCI debug), OC 5 */
48 { 1, 0, -1 }, /* P10: fingerprint reader, no OC */
49 { 1, 0, -1 }, /* P11: bluetooth, no OC. */
50 { 1, 1, -1 }, /* P12: docking, no OC */
51 { 1, 1, -1 }, /* P13: camera (LCD), no OC */
54 void mainboard_get_spd(spd_raw_data *spd, bool id_only)
56 read_spd(&spd[0], 0x50, id_only);
57 read_spd(&spd[2], 0x51, id_only);
60 void mainboard_early_init(int s3resume)
62 hybrid_graphics_init();