payloads/edk2: Disable the CPU Timer Lib unless supported
[coreboot.git] / src / mainboard / lenovo / x220 / devicetree.cb
blob923c88bc31e84e30e427f1a37855a3b63c79ce3a
1 chip northbridge/intel/sandybridge
2 # IGD Displays
3 register "gfx" = "GMA_STATIC_DISPLAYS(1)"
5 # Enable DisplayPort Hotplug with 6ms pulse
6 register "gpu_dp_d_hotplug" = "0x06"
8 # Enable Panel as LVDS and configure power delays
9 register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
10 register "gpu_panel_power_cycle_delay" = "5"
11 register "gpu_panel_power_up_delay" = "300" # T1+T2: 30ms
12 register "gpu_panel_power_down_delay" = "300" # T5+T6: 30ms
13 register "gpu_panel_power_backlight_on_delay" = "2000" # T3: 200ms
14 register "gpu_panel_power_backlight_off_delay" = "2000" # T4: 200ms
15 register "gpu_cpu_backlight" = "0x1155"
16 register "gpu_pch_backlight" = "0x06100610"
18 device cpu_cluster 0 on
19 chip cpu/intel/model_206ax
20 # Magic APIC ID to locate this chip
21 device lapic 0 on end
22 device lapic 0xacac off end
24 register "acpi_c1" = "1" # ACPI(C1) = MWAIT(C1)
25 register "acpi_c2" = "3" # ACPI(C2) = MWAIT(C3)
26 register "acpi_c3" = "5" # ACPI(C3) = MWAIT(C7)
27 end
28 end
30 device domain 0 on
31 subsystemid 0x17aa 0x21db inherit
33 device pci 00.0 on end # host bridge
34 device pci 01.0 off end # PCIe Bridge for discrete graphics
35 device pci 02.0 on end # vga controller
37 chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
38 # GPI routing
39 # 0 No effect (default)
40 # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
41 # 2 SCI (if corresponding GPIO_EN bit is also set)
42 register "alt_gp_smi_en" = "0x0000"
43 register "gpi1_routing" = "2"
44 register "gpi13_routing" = "2"
46 # Enable SATA ports 0 (HDD bay) & 1 (dock) & 2 (msata)
47 register "sata_port_map" = "0x7"
48 # Set max SATA speed to 6.0 Gb/s
49 register "sata_interface_speed_support" = "0x3"
51 register "gen1_dec" = "0x7c1601"
52 register "gen2_dec" = "0x0c15e1"
53 register "gen4_dec" = "0x0c06a1"
55 register "pcie_hotplug_map" = "{ 0, 0, 0, 1, 0, 0, 0, 0 }"
57 # Enable zero-based linear PCIe root port functions
58 register "pcie_port_coalesce" = "true"
60 register "spi_uvscc" = "0x2005"
61 register "spi_lvscc" = "0x2005"
63 device pci 16.0 on end # Management Engine Interface 1
64 device pci 16.1 off end # Management Engine Interface 2
65 device pci 16.2 off end # Management Engine IDE-R
66 device pci 16.3 off end # Management Engine KT
67 device pci 19.0 on
68 subsystemid 0x17aa 0x21ce
69 end # Intel Gigabit Ethernet
70 device pci 1a.0 on end # USB2 EHCI #2
71 device pci 1b.0 on end # High Definition Audio
72 device pci 1c.0 on end # PCIe Port #1
73 device pci 1c.1 on end # PCIe Port #2 (wlan)
74 device pci 1c.2 on end # PCIe Port #3
75 device pci 1c.3 on
76 smbios_slot_desc "7" "3" "ExpressCard Slot" "8"
77 end # PCIe Port #4
78 device pci 1c.4 on
79 chip drivers/ricoh/rce822
80 register "sdwppol" = "1"
81 register "disable_mask" = "0x87"
82 device pci 00.0 on end
83 end
84 end # PCIe Port #5 (SD)
85 device pci 1c.5 off end # PCIe Port #6
86 device pci 1c.6 on end # PCIe Port #7
87 device pci 1c.7 off end # PCIe Port #8
88 device pci 1d.0 on end # USB2 EHCI #1
89 device pci 1e.0 off end # PCI bridge
90 device pci 1f.0 on #LPC bridge
91 chip ec/lenovo/pmh7
92 device pnp ff.1 on end # dummy
93 register "backlight_enable" = "0x01"
94 register "dock_event_enable" = "0x01"
95 end
97 chip drivers/pc80/tpm
98 device pnp 0c31.0 on end
99 end
101 chip ec/lenovo/h8
102 device pnp ff.2 on # dummy
103 io 0x60 = 0x62
104 io 0x62 = 0x66
105 io 0x64 = 0x1600
106 io 0x66 = 0x1604
109 register "config0" = "0xa6"
110 register "config1" = "0x01"
111 register "config2" = "0xa0"
112 register "config3" = "0x60"
114 register "has_keyboard_backlight" = "0"
116 register "beepmask0" = "0x00"
117 register "beepmask1" = "0x86"
118 register "has_power_management_beeps" = "1"
119 register "event2_enable" = "0xff"
120 register "event3_enable" = "0xff"
121 register "event4_enable" = "0xd0"
122 register "event5_enable" = "0xfc"
123 register "event6_enable" = "0x00"
124 register "event7_enable" = "0x81"
125 register "event8_enable" = "0x7b"
126 register "event9_enable" = "0xff"
127 register "eventc_enable" = "0xff"
128 register "eventd_enable" = "0xff"
129 register "evente_enable" = "0x0d"
131 # BDC detection is broken on this board:
132 # BDC shorts pin14 and pin1
133 # BDC's connector pin14 is left floating
134 # BDC's connector pin1 is routed to SB GPIO 54
135 register "has_bdc_detection" = "0"
137 register "has_wwan_detection" = "1"
138 register "wwan_gpio_num" = "70"
139 register "wwan_gpio_lvl" = "0"
141 end # LPC bridge
142 device pci 1f.2 on end # SATA Controller 1
143 device pci 1f.3 on
144 # eeprom, 8 virtual devices, same chip
145 chip drivers/i2c/at24rf08c
146 device i2c 54 on end
147 device i2c 55 on end
148 device i2c 56 on end
149 device i2c 57 on end
150 device i2c 5c on end
151 device i2c 5d on end
152 device i2c 5e on end
153 device i2c 5f on end
155 end # SMBus
156 device pci 1f.5 off end # SATA Controller 2
157 device pci 1f.6 on end # Thermal