payloads/edk2: Disable the CPU Timer Lib unless supported
[coreboot.git] / src / mainboard / lenovo / x220 / early_init.c
blobd7fd187770b42bc7ab9a3a63750e35359354d22e
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <arch/hpet.h>
4 #include <stdint.h>
5 #include <northbridge/intel/sandybridge/sandybridge.h>
6 #include <northbridge/intel/sandybridge/raminit.h>
7 #include <northbridge/intel/sandybridge/raminit_native.h>
8 #include <southbridge/intel/bd82x6x/pch.h>
9 #include <southbridge/intel/common/gpio.h>
11 void mainboard_fill_pei_data(struct pei_data *pei_data)
13 struct pei_data pei_data_template = {
14 .pei_version = PEI_VERSION,
15 .mchbar = CONFIG_FIXED_MCHBAR_MMIO_BASE,
16 .dmibar = CONFIG_FIXED_DMIBAR_MMIO_BASE,
17 .epbar = CONFIG_FIXED_EPBAR_MMIO_BASE,
18 .pciexbar = CONFIG_ECAM_MMCONF_BASE_ADDRESS,
19 .smbusbar = CONFIG_FIXED_SMBUS_IO_BASE,
20 .wdbbar = 0x4000000,
21 .wdbsize = 0x1000,
22 .hpet_address = HPET_BASE_ADDRESS,
23 .rcba = (uintptr_t)DEFAULT_RCBA,
24 .pmbase = DEFAULT_PMBASE,
25 .gpiobase = DEFAULT_GPIOBASE,
26 .thermalbase = 0xfed08000,
27 .system_type = 0, // 0 Mobile, 1 Desktop/Server
28 .tseg_size = CONFIG_SMM_TSEG_SIZE,
29 .spd_addresses = { 0xa0, 0x00,0xa2,0x00 },
30 .ts_addresses = { 0x00, 0x00, 0x00, 0x00 },
31 .ec_present = 1,
32 .gbe_enable = 1,
33 .max_ddr3_freq = 1333,
34 .usb_port_config = {
35 { 1, 0, 0x0040 },
36 { 1, 1, 0x0080 },
37 { 1, 3, 0x0080 },
38 { 1, 3, 0x0080 },
39 { 1, 0, 0x0080 },
40 { 1, 0, 0x0080 },
41 { 1, 2, 0x0040 },
42 { 1, 2, 0x0040 },
43 { 1, 6, 0x0080 },
44 { 1, 5, 0x0080 },
45 { 1, 6, 0x0080 },
46 { 1, 6, 0x0080 },
47 { 1, 7, 0x0080 },
48 { 1, 6, 0x0080 },
51 *pei_data = pei_data_template;
54 void mainboard_get_spd(spd_raw_data *spd, bool id_only)
56 read_spd (&spd[0], 0x50, id_only);
57 read_spd (&spd[2], 0x51, id_only);
60 int mainboard_should_reset_usb(int s3resume)
62 return !s3resume;