1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <console/console.h>
4 #include <device/device.h>
8 #include <southbridge/intel/i82801gx/i82801gx.h>
9 #include <superio/nsc/pc87392/pc87392.h>
11 static void dlpc_write_register(int reg
, int value
)
17 static u8
dlpc_read_register(int reg
)
23 static void dock_write_register(int reg
, int value
)
29 static u8
dock_read_register(int reg
)
35 static void dlpc_gpio_set_mode(int port
, int mode
)
37 dlpc_write_register(0xf0, port
);
38 dlpc_write_register(0xf1, mode
);
41 static void dock_gpio_set_mode(int port
, int mode
, int irq
)
43 dock_write_register(0xf0, port
);
44 dock_write_register(0xf1, mode
);
45 dock_write_register(0xf2, irq
);
48 static void dlpc_gpio_init(void)
50 /* Select GPIO module */
51 dlpc_write_register(0x07, 0x07);
52 /* GPIO Base Address 0x1680 */
53 dlpc_write_register(0x60, 0x16);
54 dlpc_write_register(0x61, 0x80);
57 dlpc_write_register(0x30, 0x01);
59 dlpc_gpio_set_mode(0x00, 3);
60 dlpc_gpio_set_mode(0x01, 3);
61 dlpc_gpio_set_mode(0x02, 0);
62 dlpc_gpio_set_mode(0x03, 3);
63 dlpc_gpio_set_mode(0x04, 4);
64 dlpc_gpio_set_mode(0x20, 4);
65 dlpc_gpio_set_mode(0x21, 4);
66 dlpc_gpio_set_mode(0x23, 4);
73 /* Enable 14.318MHz CLK on CLKIN */
74 dlpc_write_register(0x29, 0xa0);
75 while (!(dlpc_read_register(0x29) & 0x10) && timeout
--)
81 /* Select DLPC module */
82 dlpc_write_register(0x07, 0x19);
83 /* DLPC Base Address 0x164c */
84 dlpc_write_register(0x60, 0x16);
85 dlpc_write_register(0x61, 0x4c);
87 dlpc_write_register(0x30, 0x01);
94 int dock_connect(void)
102 while (!(inb(0x164c) & 8) && timeout
--)
106 /* docking failed, disable DLPC switch */
108 dlpc_write_register(0x30, 0x00);
112 /* Assert D_PLTRST# */
115 /* Deassert D_PLTRST# */
120 /* startup 14.318MHz Clock */
121 dock_write_register(0x29, 0x06);
122 /* wait until clock is settled */
124 while (!(dock_read_register(0x29) & 0x08) && timeout
--)
135 dock_write_register(0x24, 0x37);
137 /* PNF active HIGH */
138 dock_write_register(0x25, 0xa0);
141 dock_write_register(0x26, 0x01);
143 /* Enable GPIO IRQ to #SMI */
144 dock_write_register(0x28, 0x02);
147 dock_write_register(0x07, 0x07);
149 /* set base address */
150 dock_write_register(0x60, 0x16);
151 dock_write_register(0x61, 0x20);
154 dock_gpio_set_mode(0x00, PC87392_GPIO_PIN_DEBOUNCE
|
155 PC87392_GPIO_PIN_PULLUP
, 0x00);
157 dock_gpio_set_mode(0x01, PC87392_GPIO_PIN_DEBOUNCE
|
158 PC87392_GPIO_PIN_PULLUP
,
159 PC87392_GPIO_PIN_TRIGGERS_SMI
);
161 dock_gpio_set_mode(0x02, PC87392_GPIO_PIN_PULLUP
, 0x00);
162 dock_gpio_set_mode(0x03, PC87392_GPIO_PIN_PULLUP
, 0x00);
163 dock_gpio_set_mode(0x04, PC87392_GPIO_PIN_PULLUP
, 0x00);
164 dock_gpio_set_mode(0x05, PC87392_GPIO_PIN_PULLUP
, 0x00);
165 dock_gpio_set_mode(0x06, PC87392_GPIO_PIN_PULLUP
, 0x00);
166 dock_gpio_set_mode(0x07, PC87392_GPIO_PIN_PULLUP
, 0x02);
168 dock_gpio_set_mode(0x10, PC87392_GPIO_PIN_DEBOUNCE
|
169 PC87392_GPIO_PIN_PULLUP
,
170 PC87392_GPIO_PIN_TRIGGERS_SMI
);
172 dock_gpio_set_mode(0x11, PC87392_GPIO_PIN_PULLUP
, 0x00);
173 dock_gpio_set_mode(0x12, PC87392_GPIO_PIN_PULLUP
, 0x00);
174 dock_gpio_set_mode(0x13, PC87392_GPIO_PIN_PULLUP
, 0x00);
175 dock_gpio_set_mode(0x14, PC87392_GPIO_PIN_PULLUP
, 0x00);
176 dock_gpio_set_mode(0x15, PC87392_GPIO_PIN_PULLUP
, 0x00);
177 dock_gpio_set_mode(0x16, PC87392_GPIO_PIN_PULLUP
|
178 PC87392_GPIO_PIN_OE
, 0x00);
180 dock_gpio_set_mode(0x17, PC87392_GPIO_PIN_PULLUP
, 0x00);
182 dock_gpio_set_mode(0x20, PC87392_GPIO_PIN_TYPE_PUSH_PULL
|
183 PC87392_GPIO_PIN_OE
, 0x00);
185 dock_gpio_set_mode(0x21, PC87392_GPIO_PIN_TYPE_PUSH_PULL
|
186 PC87392_GPIO_PIN_OE
, 0x00);
188 dock_gpio_set_mode(0x22, PC87392_GPIO_PIN_PULLUP
, 0x00);
189 dock_gpio_set_mode(0x23, PC87392_GPIO_PIN_PULLUP
, 0x00);
190 dock_gpio_set_mode(0x24, PC87392_GPIO_PIN_PULLUP
, 0x00);
191 dock_gpio_set_mode(0x25, PC87392_GPIO_PIN_PULLUP
, 0x00);
192 dock_gpio_set_mode(0x26, PC87392_GPIO_PIN_PULLUP
, 0x00);
193 dock_gpio_set_mode(0x27, PC87392_GPIO_PIN_PULLUP
, 0x00);
195 dock_gpio_set_mode(0x30, PC87392_GPIO_PIN_PULLUP
, 0x00);
196 dock_gpio_set_mode(0x31, PC87392_GPIO_PIN_PULLUP
, 0x00);
197 dock_gpio_set_mode(0x32, PC87392_GPIO_PIN_PULLUP
, 0x00);
198 dock_gpio_set_mode(0x33, PC87392_GPIO_PIN_PULLUP
, 0x00);
199 dock_gpio_set_mode(0x34, PC87392_GPIO_PIN_PULLUP
, 0x00);
201 dock_gpio_set_mode(0x35, PC87392_GPIO_PIN_PULLUP
|
202 PC87392_GPIO_PIN_OE
, 0x00);
204 dock_gpio_set_mode(0x36, PC87392_GPIO_PIN_PULLUP
, 0x00);
205 dock_gpio_set_mode(0x37, PC87392_GPIO_PIN_PULLUP
, 0x00);
208 dock_write_register(0x30, 0x01);
215 /* Enable USB and Ultrabay power */
218 dock_write_register(0x07, 0x03);
219 dock_write_register(0x30, 0x01);
223 void dock_disconnect(void)
225 printk(BIOS_DEBUG
, "%s enter\n", __func__
);
226 /* disconnect LPC bus */
230 /* Assert PLTRST and DLPCPD */
234 /* disable Ultrabay and USB Power */
238 printk(BIOS_DEBUG
, "%s finish\n", __func__
);
241 int dock_present(void)
243 return !((inw(DEFAULT_GPIOBASE
+ 0x0c) >> 13) & 1);
246 int dock_ultrabay_device_present(void)
248 return inb(0x1621) & 0x02 ? 0 : 1;