src/mainboard/lenovo/x60/early_init.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <bootblock_common.h>
   4 #include <delay.h>
   5 #include <stdint.h>
   6 #include <device/pnp_def.h>
   7 #include <device/pnp_ops.h>
   8 #include <device/pci_ops.h>
   9 #include <northbridge/intel/i945/i945.h>
  10 #include <southbridge/intel/i82801gx/i82801gx.h>
  11 #include <southbridge/intel/common/gpio.h>
  12 #include "dock.h"
  13
  14 /* Override the default lpc decode ranges */
  15 void mainboard_lpc_decode(void)
  16 {
  17         // decode range
  18         pci_write_config16(PCI_DEV(0, 0x1f, 0), LPC_IO_DEC, 0x0210);
  19 }
  20
  21 static void early_superio_config(void)
  22 {
  23         int timeout = 100000;
  24         const pnp_devfn_t dev = PNP_DEV(0x2e, 3);
  25
  26         pnp_write_config(dev, 0x29, 0x06);
  27
  28         while (!(pnp_read_config(dev, 0x29) & 0x08) && timeout--)
  29                 udelay(1000);
  30
  31         /* Enable COM1 */
  32         pnp_set_logical_device(dev);
  33         pnp_set_iobase(dev, PNP_IDX_IO0, 0x3f8);
  34         pnp_set_enable(dev, 1);
  35 }
  36
  37 void bootblock_mainboard_early_init(void)
  38 {
  39         /* Set up GPIO's early since it is needed for dock init */
  40         i82801gx_setup_bars();
  41         setup_pch_gpios(&mainboard_gpio_map);
  42
  43         dlpc_init();
  44         /* dock_init initializes the DLPC switch on
  45          *  thinpad side, so this is required even
  46          *  if we're undocked.
  47          */
  48         if (dock_present()) {
  49                 dock_connect();
  50                 early_superio_config();
  51         }
  52 }
  53
  54 void mainboard_late_rcba_config(void)
  55 {
  56         /* Device 1f interrupt pin register */
  57         RCBA32(D31IP) = 0x00001230;
  58         RCBA32(D29IP) = 0x40004321;
  59
  60         /* PCIe Interrupts */
  61         RCBA32(D28IP) = 0x00004321;
  62         /* HD Audio Interrupt */
  63         RCBA32(D27IP) = 0x00000002;
  64
  65         /* dev irq route register */
  66         RCBA16(D31IR) = 0x1007;
  67         RCBA16(D30IR) = 0x0076;
  68         RCBA16(D29IR) = 0x3210;
  69         RCBA16(D28IR) = 0x7654;
  70         RCBA16(D27IR) = 0x0010;
  71
  72         /* Disable unused devices */
  73         RCBA32(FD) |= FD_INTLAN;
  74
  75         /* Set up I/O Trap #0 for 0xfe00 (SMIC) */
  76         RCBA64(IOTR0) = 0x000200010000fe01ULL;
  77
  78         /* Set up I/O Trap #3 for 0x800-0x80c (Trap) */
  79         RCBA64(IOTR3) = 0x000200f0000c0801ULL;
  80 }
  81
  82 void mainboard_get_spd_map(u8 spd_map[4])
  83 {
  84         spd_map[0] = 0x50;
  85         spd_map[2] = 0x51;
  86 }