1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <vendorcode/amd/agesa/f15tn/AGESA.h>
5 /* Include the files that instantiate the configuration definitions. */
6 #include <vendorcode/amd/agesa/f15tn/Include/AdvancedApi.h>
7 #include <vendorcode/amd/agesa/f15tn/Proc/CPU/cpuFamilyTranslation.h>
8 #include <vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuFeatures.h>
9 #include <vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.h>
10 /* AGESA nonsense: the next two headers depend on heapManager.h */
11 #include <vendorcode/amd/agesa/f15tn/Proc/Common/CreateStruct.h>
12 #include <vendorcode/amd/agesa/f15tn/Proc/CPU/cpuEarlyInit.h>
13 /* These tables are optional and may be used to adjust memory timing settings */
14 #include <vendorcode/amd/agesa/f15tn/Proc/Mem/mm.h>
15 #include <vendorcode/amd/agesa/f15tn/Proc/Mem/mn.h>
17 /* Select the CPU family */
18 #define INSTALL_FAMILY_15_MODEL_1x_SUPPORT TRUE
20 /* Select the CPU socket type */
21 #define INSTALL_FM2_SOCKET_SUPPORT TRUE
23 //#define BLDOPT_REMOVE_UDIMMS_SUPPORT TRUE
24 #define BLDOPT_REMOVE_SODIMMS_SUPPORT TRUE
25 #define BLDOPT_REMOVE_RDIMMS_SUPPORT TRUE
26 #define BLDOPT_REMOVE_LRDIMMS_SUPPORT TRUE
27 #define BLDOPT_REMOVE_ECC_SUPPORT TRUE
28 #define BLDOPT_REMOVE_SRAT FALSE
29 #define BLDOPT_REMOVE_WHEA FALSE
30 #define BLDOPT_REMOVE_CRAT TRUE
32 /* Build configuration values here */
33 #define BLDCFG_AMD_PLATFORM_TYPE AMD_PLATFORM_MOBILE
35 #define BLDCFG_MEMORY_RDIMM_CAPABLE FALSE
36 #define BLDCFG_MEMORY_UDIMM_CAPABLE TRUE
37 #define BLDCFG_MEMORY_SODIMM_CAPABLE FALSE
38 #define BLDCFG_MEMORY_CHANNEL_INTERLEAVING TRUE
39 #define BLDCFG_MEMORY_CLOCK_SELECT DDR1600_FREQUENCY
40 #define BLDCFG_ENABLE_ECC_FEATURE FALSE
41 #define BLDCFG_ECC_SYNC_FLOOD FALSE
43 #define BLDCFG_UMA_ALLOCATION_MODE UMA_SPECIFIED
44 #define BLDCFG_UMA_ALLOCATION_SIZE 0x2000 /* (0x2000 << 16) = 512M */
46 #define BLDCFG_IOMMU_SUPPORT TRUE
48 #define BLDCFG_CFG_GNB_HD_AUDIO TRUE
50 /* Customized OEM build configurations for FCH component */
51 #define BLDCFG_FCH_GPP_LINK_CONFIG PortA1B1C1D1
52 #define BLDCFG_FCH_GPP_PORT0_PRESENT TRUE
53 #define BLDCFG_FCH_GPP_PORT1_PRESENT TRUE
55 CONST GPIO_CONTROL ms7721_m_gpio
[] = {
59 #define BLDCFG_FCH_GPIO_CONTROL_LIST (ms7721_m_gpio)
62 * Process the options...
63 * This file include MUST occur AFTER the user option selection settings.
64 * AGESA nonsense: Moving this include up will break AGESA.
66 #include <PlatformInstall.h>