src/mainboard/msi/ms7d25/bootblock.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <bootblock_common.h>
   4 #include <device/pnp_ops.h>
   5 #include <superio/nuvoton/common/nuvoton.h>
   6 #include <superio/nuvoton/nct6687d/nct6687d.h>
   7
   8 #define SERIAL_DEV PNP_DEV(0x4e, NCT6687D_SP1)
   9
  10 void bootblock_mainboard_early_init(void)
  11 {
  12         /* Replicate vendor settings for multi-function pins in global config LDN */
  13         nuvoton_pnp_enter_conf_state(SERIAL_DEV);
  14         pnp_write_config(SERIAL_DEV, 0x13, 0xff); // IRQ8-15 level triggered, low
  15         pnp_write_config(SERIAL_DEV, 0x14, 0xff); // IRQ0-7 level triggered, low
  16         pnp_write_config(SERIAL_DEV, 0x15, 0xaa);
  17         pnp_write_config(SERIAL_DEV, 0x1a, 0x02);
  18         pnp_write_config(SERIAL_DEV, 0x1b, 0x02);
  19         pnp_write_config(SERIAL_DEV, 0x1d, 0x00);
  20         pnp_write_config(SERIAL_DEV, 0x1e, 0xaa);
  21         pnp_write_config(SERIAL_DEV, 0x1f, 0xb2);
  22         pnp_write_config(SERIAL_DEV, 0x22, 0xbd);
  23         pnp_write_config(SERIAL_DEV, 0x23, 0xdf);
  24         pnp_write_config(SERIAL_DEV, 0x24, 0x39);
  25         pnp_write_config(SERIAL_DEV, 0x25, 0xfe);
  26         pnp_write_config(SERIAL_DEV, 0x26, 0x40);
  27         pnp_write_config(SERIAL_DEV, 0x27, 0x77);
  28         pnp_write_config(SERIAL_DEV, 0x28, 0x00);
  29         pnp_write_config(SERIAL_DEV, 0x29, 0xfb);
  30         pnp_write_config(SERIAL_DEV, 0x2a, 0x80);
  31         pnp_write_config(SERIAL_DEV, 0x2b, 0x20);
  32         pnp_write_config(SERIAL_DEV, 0x2c, 0x8a);
  33         pnp_write_config(SERIAL_DEV, 0x2d, 0xaa);
  34         nuvoton_pnp_exit_conf_state(SERIAL_DEV);
  35
  36         if (CONFIG(CONSOLE_SERIAL))
  37                 nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
  38 }