1 config SOC_EXAMPLE_MIN86
4 This example SoC code along with the example/min86 mainboard
5 should serve as a minimal example how a buildable x86 SoC code
8 This can serve, for instance, as a basis to add new SoCs to
9 coreboot. Starting with a buildable commit should help with
10 the review of the actual code, and also avoid any regressions
11 when common coreboot code changes.
15 config SOC_SPECIFIC_OPTIONS
18 select NO_MONOTONIC_TIMER
19 select NO_ECAM_MMCONF_SUPPORT
20 select UNKNOWN_TSC_RATE
22 config DCACHE_BSP_STACK_SIZE # required by arch/x86/car.ld