payloads/edk2: Disable the CPU Timer Lib unless supported
[coreboot.git] / src / superio / fintek / common / early_serial.c
blob79af111c2ea0a216617d3e9d4218d2d2cd720c1e
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 /*
4 * A generic romstage (pre-ram) driver for Fintek variant Super I/O chips.
6 * The following is derived directly from the vendor Fintek's data-sheets:
8 * To toggle between `configuration mode` and `normal operation mode` as to
9 * manipulation the various LDN's in Fintek Super I/O's we are required to pass
10 * magic numbers `passwords keys`.
12 * FINTEK_ENTRY_KEY := enable configuration : 0x87
13 * FINTEK_EXIT_KEY := disable configuration : 0xAA
15 * To modify a LDN's configuration register, we use the index port to select
16 * the index of the LDN and then writing to the data port to alter the
17 * parameters. A default index, data port pair is 0x4E, 0x4F respectively, a
18 * user modified pair is 0x2E, 0x2F respectively.
22 #include <arch/io.h>
23 #include <device/pnp_ops.h>
24 #include <device/pnp.h>
25 #include <stdint.h>
26 #include "fintek.h"
28 #define FINTEK_ENTRY_KEY 0x87
29 #define FINTEK_EXIT_KEY 0xAA
31 /* Enable configuration: pass entry key '0x87' into index port dev. */
32 void pnp_enter_conf_state(pnp_devfn_t dev)
34 u16 port = dev >> 8;
35 outb(FINTEK_ENTRY_KEY, port);
36 outb(FINTEK_ENTRY_KEY, port);
39 /* Disable configuration: pass exit key '0xAA' into index port dev. */
40 void pnp_exit_conf_state(pnp_devfn_t dev)
42 u16 port = dev >> 8;
43 outb(FINTEK_EXIT_KEY, port);
46 /* Bring up early serial debugging output before the RAM is initialized. */
47 void fintek_enable_serial(pnp_devfn_t dev, u16 iobase)
49 pnp_enter_conf_state(dev);
50 pnp_set_logical_device(dev);
51 pnp_set_enable(dev, 0);
52 pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
53 pnp_set_enable(dev, 1);
54 pnp_exit_conf_state(dev);