payloads/edk2: Disable the CPU Timer Lib unless supported
[coreboot.git] / src / superio / fintek / f71808a / chip.h
bloba1ee597b43c0643c903a4a83442a4849b0b126f8
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #ifndef SUPERIO_FINTEK_F71808A_CHIP_H
4 #define SUPERIO_FINTEK_F71808A_CHIP_H
6 #include <stdint.h>
8 struct superio_fintek_f71808a_config {
10 uint8_t hwm_vt1_boundary_1_temperature;
11 uint8_t hwm_vt1_boundary_2_temperature;
12 uint8_t hwm_vt1_boundary_3_temperature;
13 uint8_t hwm_vt1_boundary_4_temperature;
14 uint8_t hwm_fan1_boundary_hysteresis;
15 uint8_t hwm_domain1_en;
17 /* Multi function registers */
18 uint8_t multi_function_register_0;
19 uint8_t multi_function_register_1;
20 uint8_t multi_function_register_2;
21 uint8_t multi_function_register_3;
22 uint8_t multi_function_register_4;
24 /* Intel Ibex Peak/PECI/AMD TSI */
25 uint8_t hwm_peci_tsi_ctrl;
26 uint8_t hwm_tcc_temp;
28 /* Fan 1 control */
29 uint8_t hwm_fan1_seg1_speed;
30 uint8_t hwm_fan1_seg2_speed;
31 uint8_t hwm_fan1_seg3_speed;
32 uint8_t hwm_fan1_seg4_speed;
33 uint8_t hwm_fan1_seg5_speed;
34 uint8_t hwm_fan1_temp_src;
36 /* Fan 2 control */
37 uint8_t hwm_fan2_seg1_speed;
38 uint8_t hwm_fan2_seg2_speed;
39 uint8_t hwm_fan2_seg3_speed;
40 uint8_t hwm_fan2_seg4_speed;
41 uint8_t hwm_fan2_seg5_speed;
42 uint8_t hwm_fan2_temp_src;
45 #endif /* SUPERIO_FINTEK_F71808A_CHIP_H */