src/superio/fintek/f81866d/superio.c

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2
   3 #include <device/device.h>
   4 #include <device/pnp.h>
   5 #include <superio/conf_mode.h>
   6 #include <pc80/keyboard.h>
   7
   8 #include "f81866d.h"
   9 #include "fintek_internal.h"
  10
  11 static void f81866d_init(struct device *dev)
  12 {
  13         if (!dev->enabled)
  14                 return;
  15
  16         switch (dev->path.pnp.device) {
  17         /* TODO: Might potentially need extra code for serial, wdt etc. */
  18         case F81866D_KBC:
  19                 pc_keyboard_init(NO_AUX_DEVICE);
  20                 break;
  21         case F81866D_HWM:
  22                 // Fixing temp sensor read out and init Fan control
  23                 f81866d_hwm_init(dev);
  24                 break;
  25         case F81866D_SP1:
  26                 // Enable Uart1 and IRQ share register
  27                 f81866d_uart_init(dev);
  28                 break;
  29         case F81866D_SP2:
  30                 // Enable Uart2 and IRQ share register
  31                 f81866d_uart_init(dev);
  32                 break;
  33         case F81866D_SP3:
  34                 // Enable Uart3 and IRQ share register
  35                 f81866d_uart_init(dev);
  36                 break;
  37         case F81866D_SP4:
  38                 // Enable Uart4 and IRQ share register
  39                 f81866d_uart_init(dev);
  40                 break;
  41         }
  42 }
  43
  44 static struct device_operations ops = {
  45         .read_resources   = pnp_read_resources,
  46         .set_resources    = pnp_set_resources,
  47         .enable_resources = pnp_enable_resources,
  48         .enable           = pnp_alt_enable,
  49         .init             = f81866d_init,
  50         .ops_pnp_mode     = &pnp_conf_mode_8787_aa,
  51 };
  52
  53 static struct pnp_info pnp_dev_info[] = {
  54         /* TODO: Some of the 0x7f8 etc. values may not be correct. */
  55         { NULL, F81866D_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
  56         { NULL, F81866D_SP1,  PNP_IO0 | PNP_IRQ0, 0x7f8, },
  57         { NULL, F81866D_SP2,  PNP_IO0 | PNP_IRQ0, 0x7f8, },
  58         { NULL, F81866D_SP3,  PNP_IO0 | PNP_IRQ0, 0x7f8, },
  59         { NULL, F81866D_SP4,  PNP_IO0 | PNP_IRQ0, 0x7f8, },
  60         { NULL, F81866D_SP5,  PNP_IO0 | PNP_IRQ0, 0x7f8, },
  61         { NULL, F81866D_SP6,  PNP_IO0 | PNP_IRQ0, 0x7f8, },
  62         { NULL, F81866D_KBC,  PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, 0x07ff, },
  63         { NULL, F81866D_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
  64         { NULL, F81866D_HWM,  PNP_IO0 | PNP_IRQ0, 0xff8, },
  65         { NULL, F81866D_GPIO, PNP_IRQ0, },
  66         { NULL, F81866D_PME, },
  67         { NULL, F81866D_WDT, },
  68 };
  69
  70 static void enable_dev(struct device *dev)
  71 {
  72         pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
  73 }
  74
  75 struct chip_operations superio_fintek_f81866d_ops = {
  76         CHIP_NAME("Fintek F81866AD-I Super I/O")
  77         .enable_dev = enable_dev
  78 };