payloads/edk2: Disable the CPU Timer Lib unless supported
[coreboot.git] / src / superio / smsc / smscsuperio / early_serial.c
blobb9f6e70fef6ff478b2f79e5ed4d1518da003f31f
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #include <arch/io.h>
4 #include <device/pnp_ops.h>
5 #include <device/pnp_def.h>
6 #include <stdint.h>
8 #include "smscsuperio.h"
10 #define SMSC_ENTRY_KEY 0x55
11 #define SMSC_EXIT_KEY 0xAA
13 /* Enable configuration: pass entry key '0x87' into index port dev. */
14 static void pnp_enter_conf_state(pnp_devfn_t dev)
16 u16 port = dev >> 8;
17 outb(SMSC_ENTRY_KEY, port);
20 /* Disable configuration: pass exit key '0xAA' into index port dev. */
21 static void pnp_exit_conf_state(pnp_devfn_t dev)
23 u16 port = dev >> 8;
24 outb(SMSC_EXIT_KEY, port);
27 /**
28 * Enable the specified serial port.
30 * @param dev The device to use.
31 * @param iobase The I/O base of the serial port (usually 0x3f8/0x2f8).
33 void smscsuperio_enable_serial(pnp_devfn_t dev, u16 iobase)
35 pnp_enter_conf_state(dev);
36 pnp_set_logical_device(dev);
37 pnp_set_enable(dev, 0);
38 pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
39 switch (iobase) {
40 case 0x03f8:
41 pnp_set_irq(dev, PNP_IDX_IRQ0, 4);
42 break;
43 case 0x02f8:
44 pnp_set_irq(dev, PNP_IDX_IRQ0, 3);
45 break;
47 pnp_set_enable(dev, 1);
48 pnp_exit_conf_state(dev);