payloads/edk2: Disable the CPU Timer Lib unless supported
[coreboot.git] / src / superio / winbond / w83627thg / superio.c
blob4276da6f5b6cc907cfd2b903d79aa5ae93307793
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #include <device/device.h>
4 #include <device/pnp.h>
5 #include <superio/conf_mode.h>
6 #include <pc80/keyboard.h>
7 #include "w83627thg.h"
9 static void w83627thg_init(struct device *dev)
12 if (!dev->enabled)
13 return;
15 switch (dev->path.pnp.device) {
16 case W83627THG_KBC:
17 pc_keyboard_init(NO_AUX_DEVICE);
18 break;
22 static struct device_operations ops = {
23 .read_resources = pnp_read_resources,
24 .set_resources = pnp_set_resources,
25 .enable_resources = pnp_enable_resources,
26 .enable = pnp_enable,
27 .init = w83627thg_init,
28 .ops_pnp_mode = &pnp_conf_mode_8787_aa,
31 static struct pnp_info pnp_dev_info[] = {
32 { NULL, W83627THG_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
33 { NULL, W83627THG_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
34 { NULL, W83627THG_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
35 { NULL, W83627THG_SP2, PNP_IO0 | PNP_IRQ0 | PNP_MSC1, 0x07f8, },
36 { NULL, W83627THG_KBC,
37 PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1 | PNP_MSC0,
38 0x07ff, 0x07ff, },
39 { NULL, W83627THG_GAME_MIDI_GPIO1, PNP_IO0 | PNP_IO1 | PNP_IRQ0,
40 0x07ff, 0x07fe, },
41 { NULL, W83627THG_GPIO2, },
42 { NULL, W83627THG_GPIO3, PNP_EN | PNP_MSC0 | PNP_MSC1, },
43 { NULL, W83627THG_ACPI, PNP_IRQ0, },
44 { NULL, W83627THG_HWM, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
47 static void enable_dev(struct device *dev)
49 pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
52 struct chip_operations superio_winbond_w83627thg_ops = {
53 CHIP_NAME("Winbond W83627THG Super I/O")
54 .enable_dev = enable_dev,