3 This page describes how to run coreboot on Lenovo M920 Tiny (M920q, M920x).
8 +------------+---------------------------------------------------------------+
9 | CPU | Intel Core 8th Gen or 9th Gen (Coffee Lake (Refresh)) |
10 +------------+---------------------------------------------------------------+
11 | DRAM | 2 SO-DIMM slots, DDR4-2400/2666 |
12 +------------+---------------------------------------------------------------+
13 | Chipset | Intel Q370 |
14 +------------+---------------------------------------------------------------+
15 | Super I/O | NCT6686D-L |
16 +------------+---------------------------------------------------------------+
17 | TPM | Infineon SLB 9670VQ2.0 |
18 +------------+---------------------------------------------------------------+
19 | Boot | USB, SATA (on-board SATA1 port, M.2 ports), NVMe |
20 +------------+---------------------------------------------------------------+
21 | Power | 65-135 W power adapter |
22 +------------+---------------------------------------------------------------+
25 More specifications on [Lenovo M920 Tiny specifications].
30 +---------------------+--------------------------+
32 +=====================+==========================+
33 | Socketed flash | no |
34 +---------------------+--------------------------+
35 | Model | W25Q128JV + W25Q64JV |
36 +---------------------+--------------------------+
38 +---------------------+--------------------------+
39 | Package | SOIC-8 + SOIC-8 |
40 +---------------------+--------------------------+
41 | Write protection | chipset PRR |
42 +---------------------+--------------------------+
43 | Dual BIOS feature | no |
44 +---------------------+--------------------------+
45 | Internal flashing | after flashing coreboot |
46 +---------------------+--------------------------+
49 ### Internal programming
51 The SPI flash can be accessed using [flashrom].
53 flashrom -p internal -N -w coreboot.rom --ifd -i bios
55 Internal programming can be used after the coreboot has been flashed externally
56 for the first time. Internal programming when migrating from original UEFI
57 firmware **has not been tested**.
59 ### External programming
61 The external access to flash chip is available through standard SOP-8 clip. The
62 voltage of both SPI chips is 3.3V.
64 It is recommended to flash firmware without supplying power from power adapter.
66 The resulting coreboot.rom file must be split into two binaries, one for each
69 dd if=build/coreboot.rom of=build/coreboot_flash_1.rom bs=16M count=1
70 dd if=build/coreboot.rom of=build/coreboot_flash_2.rom bs=8M skip=2
72 The flash chips are marked on the mainboard as BIOS1 and BIOS2 respectively.
73 They can be flashed with following commands:
75 flashrom -p ch341a_spi -w build/coreboot_flash_1.rom
76 flashrom -p ch341a_spi -w build/coreboot_flash_2.rom -c "W25Q64JV-.Q"
80 - front audio jacks do not work
84 Tested with edk2 payload (mrchromebox) and Ubuntu 22.04 (Linux 6.2.0):
86 - Serial adapter from daughter board (COM1 connector)
87 - USB 3.0 and 2.0 rear and front ports (edk2 and Linux 6.2.0)
88 - USB-C port (charging, data)
97 - PCIe x8 tested using BA7H70 Rev 1.2 riser and Intel X540-T2 10G dual 10GbE card
98 - another riser with PCIe x4 connector remains untested - please modify this
99 page if you do test it!
101 [flashrom]: https://flashrom.org/Flashrom
102 [Lenovo M920 Tiny specifications]: https://psref.lenovo.com/syspool/Sys/PDF/ThinkCentre/ThinkCentre_M920_Tiny/ThinkCentre_M920_Tiny_Spec.PDF