src/cpu/intel/socket_FCBGA559/Kconfig

   1 ## SPDX-License-Identifier: GPL-2.0-only
   2
   3 config CPU_INTEL_SOCKET_FCBGA559
   4         bool
   5         select CPU_INTEL_MODEL_106CX
   6         select CPU_HAS_L2_ENABLE_MSR
   7         help
   8           Select this socket on Intel Pineview
   9
  10 if CPU_INTEL_SOCKET_FCBGA559
  11
  12 config DCACHE_RAM_BASE
  13         hex
  14         default 0xfefc0000
  15
  16 config DCACHE_RAM_SIZE
  17         hex
  18         default 0x8000
  19
  20 config PRERAM_CBFS_CACHE_SIZE
  21         default 0x0
  22
  23 config DCACHE_BSP_STACK_SIZE
  24         hex
  25         default 0x2000
  26         help
  27           The amount of anticipated stack usage in CAR by bootblock and
  28           other stages.
  29
  30 config MAX_CPUS
  31         int
  32         default 4
  33
  34 endif