soc/intel/ptl: Update ME specification version to 21
[coreboot.git] / src / cpu / x86 / 64bit / Makefile.mk
blob8ce36659d6a6a3bd2d40008e1c3d6b1f3e35508e
1 ## SPDX-License-Identifier: GPL-2.0-only
3 all_x86-y += mode_switch.S
4 all_x86-y += mode_switch2.S
6 ifeq ($(CONFIG_NEED_SMALL_2MB_PAGE_TABLES),y)
7 PAGETABLE_SRC := pt.S
8 else
9 PAGETABLE_SRC := pt1G.S
10 endif
12 all_x86-y += $(PAGETABLE_SRC)
14 # Add --defsym=_start=0 to suppress a linker warning.
15 $(objcbfs)/pt: $(dir)/$(PAGETABLE_SRC) $(obj)/config.h
16 $(CC_bootblock) $(CFLAGS_bootblock) $(CPPFLAGS_bootblock) -o $@.tmp $< -Wl,--section-start=.rodata=$(CONFIG_ARCH_X86_64_PGTBL_LOC),--defsym=_start=0 -fuse-ld=bfd
17 $(OBJCOPY_ramstage) -Obinary -j .rodata $@.tmp $@
18 rm $@.tmp
20 cbfs-files-$(CONFIG_PAGE_TABLES_IN_CBFS) += pagetables
21 pagetables-file := $(objcbfs)/pt
22 pagetables-type := raw
23 pagetables-compression := none
24 pagetables-COREBOOT-position := $(CONFIG_ARCH_X86_64_PGTBL_LOC)