src/drivers/pc80/rtc/mc146818rtc.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <acpi/acpi.h>
   4 #include <arch/io.h>
   5 #include <commonlib/bsd/bcd.h>
   6 #include <console/console.h>
   7 #include <fallback.h>
   8 #include <pc80/mc146818rtc.h>
   9 #include <rtc.h>
  10 #include <security/vboot/vbnv.h>
  11 #include <security/vboot/vbnv_layout.h>
  12 #include <types.h>
  13 #include <version.h>
  14
  15 static void cmos_reset_date(void)
  16 {
  17         /* Now setup a default date equals to the build date */
  18         struct rtc_time time = {
  19                 .sec = 0,
  20                 .min = 0,
  21                 .hour = 1,
  22                 .mday = bcd2bin(coreboot_build_date.day),
  23                 .mon = bcd2bin(coreboot_build_date.month),
  24                 .year = (bcd2bin(coreboot_build_date.century) * 100) +
  25                         bcd2bin(coreboot_build_date.year),
  26                 .wday = bcd2bin(coreboot_build_date.weekday)
  27         };
  28         rtc_set(&time);
  29 }
  30
  31 int cmos_checksum_valid(int range_start, int range_end, int cks_loc)
  32 {
  33         int i;
  34         u16 sum, old_sum;
  35
  36         if (CONFIG(STATIC_OPTION_TABLE))
  37                 return 1;
  38
  39         sum = 0;
  40         for (i = range_start; i <= range_end; i++)
  41                 sum += cmos_read(i);
  42         old_sum = ((cmos_read(cks_loc) << 8) | cmos_read(cks_loc + 1)) &
  43                   0x0ffff;
  44         return sum == old_sum;
  45 }
  46
  47 void cmos_set_checksum(int range_start, int range_end, int cks_loc)
  48 {
  49         int i;
  50         u16 sum;
  51
  52         sum = 0;
  53         for (i = range_start; i <= range_end; i++)
  54                 sum += cmos_read(i);
  55         cmos_write(((sum >> 8) & 0x0ff), cks_loc);
  56         cmos_write(((sum >> 0) & 0x0ff), cks_loc + 1);
  57 }
  58
  59 /* See if the CMOS error condition has been flagged */
  60 int cmos_error(void)
  61 {
  62         return (cmos_read(RTC_VALID) & RTC_VRT) == 0;
  63 }
  64
  65 #define RTC_CONTROL_DEFAULT (RTC_24H)
  66 #define RTC_FREQ_SELECT_DEFAULT (RTC_REF_CLCK_32KHZ | RTC_RATE_1024HZ)
  67
  68 _Static_assert(!CONFIG(SOC_AMD_COMMON) || !(RTC_FREQ_SELECT_DEFAULT & RTC_AMD_BANK_SELECT),
  69                "Bank 1 should not be selected for AMD");
  70
  71 static bool __cmos_init(bool invalid)
  72 {
  73         bool cmos_invalid;
  74         bool checksum_invalid = false;
  75         bool cleared_cmos = false;
  76         size_t i;
  77
  78         /*
  79          * Avoid clearing pending interrupts and resetting the RTC control
  80          * register in the resume path because the Linux kernel relies on
  81          * this to know if it should restart the RTC timer queue if the wake
  82          * was due to the RTC alarm.
  83          */
  84         if (ENV_RAMSTAGE && acpi_is_wakeup_s3())
  85                 return false;
  86
  87         printk(BIOS_DEBUG, "RTC Init\n");
  88
  89         /* See if there has been a CMOS power problem. */
  90         cmos_invalid = cmos_error();
  91
  92         if (CONFIG(USE_OPTION_TABLE)) {
  93                 /* See if there is a CMOS checksum error */
  94                 checksum_invalid = !cmos_checksum_valid(PC_CKS_RANGE_START,
  95                                                 PC_CKS_RANGE_END, PC_CKS_LOC);
  96         }
  97
  98         if (cmos_invalid || invalid)
  99                 cmos_disable_rtc();
 100
 101         if (invalid || cmos_invalid || checksum_invalid) {
 102                 if (!CONFIG(USE_OPTION_TABLE)) {
 103                         cmos_write(0, RTC_CLK_SECOND_ALARM);
 104                         cmos_write(0, RTC_CLK_MINUTE_ALARM);
 105                         cmos_write(0, RTC_CLK_HOUR_ALARM);
 106                         for (i = 10; i < 128; i++)
 107                                 cmos_write(0, i);
 108                         cleared_cmos = true;
 109                 }
 110
 111                 if (cmos_invalid || invalid)
 112                         cmos_reset_date();
 113
 114                 printk(BIOS_WARNING, "RTC:%s%s%s%s\n",
 115                         invalid ? " Clear requested":"",
 116                         cmos_invalid ? " Power Problem":"",
 117                         checksum_invalid ? " Checksum invalid":"",
 118                         cleared_cmos ? " zeroing cmos":"");
 119         }
 120
 121         /* Setup the real time clock */
 122         cmos_write(RTC_CONTROL_DEFAULT, RTC_CONTROL);
 123         /* Setup the frequency it operates at */
 124         cmos_write(RTC_FREQ_SELECT_DEFAULT, RTC_FREQ_SELECT);
 125         /* Ensure all reserved bits are 0 in register D */
 126         cmos_write(RTC_VRT, RTC_VALID);
 127
 128         if (CONFIG(USE_OPTION_TABLE)) {
 129                 /* See if there is a LB CMOS checksum error */
 130                 checksum_invalid = !cmos_lb_cks_valid();
 131                 if (checksum_invalid)
 132                         printk(BIOS_DEBUG, "RTC: coreboot checksum invalid\n");
 133
 134                 /* Make certain we have a valid checksum */
 135                 cmos_set_checksum(PC_CKS_RANGE_START, PC_CKS_RANGE_END, PC_CKS_LOC);
 136         }
 137
 138         /* Clear any pending interrupts */
 139         cmos_read(RTC_INTR_FLAGS);
 140
 141         return cleared_cmos;
 142 }
 143
 144 static void cmos_init_vbnv(bool invalid)
 145 {
 146         uint8_t vbnv[VBOOT_VBNV_BLOCK_SIZE];
 147
 148         /* __cmos_init() will clear vbnv contents when a known rtc failure
 149            occurred with !CONFIG(USE_OPTION_TABLE). However, __cmos_init() may
 150            clear vbnv data for other internal reasons. For that, always back up
 151            the vbnv contents and conditionally save them when __cmos_init()
 152            indicates CMOS was cleared. */
 153         read_vbnv_cmos(vbnv);
 154
 155         if (__cmos_init(invalid))
 156                 save_vbnv_cmos(vbnv);
 157 }
 158
 159 void cmos_init(bool invalid)
 160 {
 161         if (ENV_SMM)
 162                 return;
 163
 164         if (CONFIG(VBOOT_VBNV_CMOS))
 165                 cmos_init_vbnv(invalid);
 166         else
 167                 __cmos_init(invalid);
 168 }
 169
 170 /*
 171  * Upon return the caller is guaranteed 244 microseconds to complete any
 172  * RTC operations. wait_uip may be called a single time prior to multiple
 173  * accesses, but sequences requiring more time should call wait_uip again.
 174  */
 175 static void wait_uip(void)
 176 {
 177         while (cmos_read(RTC_REG_A) & RTC_UIP)
 178                 ;
 179 }
 180
 181 /* Perform a sanity check of current date and time. */
 182 static int cmos_date_invalid(void)
 183 {
 184         struct rtc_time now;
 185
 186         rtc_get(&now);
 187         return rtc_invalid(&now);
 188 }
 189
 190 /*
 191  * If the CMOS is cleared, the rtc_reg has the invalid date. That
 192  * hurts some OSes. Even if we don't set USE_OPTION_TABLE, we need
 193  * to make sure the date is valid.
 194  */
 195 void cmos_check_update_date(void)
 196 {
 197         u8 year, century = 0;
 198
 199         wait_uip();
 200         if (CONFIG(USE_PC_CMOS_ALTCENTURY))
 201                 century = cmos_read(RTC_CLK_ALTCENTURY);
 202         year = cmos_read(RTC_CLK_YEAR);
 203
 204         /*
 205          * If century is 0xFF, 100% that the CMOS is cleared.
 206          * In addition, check the sanity of all values and reset the date in case of
 207          * insane values.
 208          */
 209         if (century > 0x99 || year > 0x99 || cmos_date_invalid()) /* Invalid date */
 210                 cmos_reset_date();
 211 }
 212
 213 int rtc_set(const struct rtc_time *time)
 214 {
 215         cmos_write(bin2bcd(time->sec), RTC_CLK_SECOND);
 216         cmos_write(bin2bcd(time->min), RTC_CLK_MINUTE);
 217         cmos_write(bin2bcd(time->hour), RTC_CLK_HOUR);
 218         cmos_write(bin2bcd(time->mday), RTC_CLK_DAYOFMONTH);
 219         cmos_write(bin2bcd(time->mon), RTC_CLK_MONTH);
 220         cmos_write(bin2bcd(time->year % 100), RTC_CLK_YEAR);
 221         if (CONFIG(USE_PC_CMOS_ALTCENTURY))
 222                 cmos_write(bin2bcd(time->year / 100), RTC_CLK_ALTCENTURY);
 223         cmos_write(bin2bcd(time->wday + 1), RTC_CLK_DAYOFWEEK);
 224         return 0;
 225 }
 226
 227 int rtc_get(struct rtc_time *time)
 228 {
 229         wait_uip();
 230         time->sec = bcd2bin(cmos_read(RTC_CLK_SECOND));
 231         time->min = bcd2bin(cmos_read(RTC_CLK_MINUTE));
 232         time->hour = bcd2bin(cmos_read(RTC_CLK_HOUR));
 233         time->mday = bcd2bin(cmos_read(RTC_CLK_DAYOFMONTH));
 234         time->mon = bcd2bin(cmos_read(RTC_CLK_MONTH));
 235         time->year = bcd2bin(cmos_read(RTC_CLK_YEAR));
 236         if (CONFIG(USE_PC_CMOS_ALTCENTURY)) {
 237                 time->year += bcd2bin(cmos_read(RTC_CLK_ALTCENTURY)) * 100;
 238         } else {
 239                 time->year += 1900;
 240                 if (time->year < 1970)
 241                         time->year += 100;
 242         }
 243         time->wday = bcd2bin(cmos_read(RTC_CLK_DAYOFWEEK)) - 1;
 244         return 0;
 245 }
 246
 247 /*
 248  * Signal coreboot proper completed -- just before running payload
 249  * or jumping to ACPI S3 wakeup vector.
 250  */
 251 void set_boot_successful(void)
 252 {
 253         uint8_t index, byte;
 254
 255         index = inb(RTC_PORT_BANK0(0)) & 0x80;
 256         index |= RTC_BOOT_BYTE;
 257         outb(index, RTC_PORT_BANK0(0));
 258
 259         byte = inb(RTC_PORT_BANK0(1));
 260
 261         if (CONFIG(SKIP_MAX_REBOOT_CNT_CLEAR)) {
 262                 /*
 263                  * Set the fallback boot bit to allow for recovery if
 264                  * the payload fails to boot.
 265                  * It is the responsibility of the payload to reset
 266                  * the normal boot bit to 1 if desired
 267                  */
 268                 byte &= ~RTC_BOOT_NORMAL;
 269         } else {
 270                 /* If we are in normal mode set the boot count to 0 */
 271                 if (byte & RTC_BOOT_NORMAL)
 272                         byte &= 0x0f;
 273         }
 274
 275         outb(byte, RTC_PORT_BANK0(1));
 276 }