src/mainboard/google/brya/variants/joxer/gpio.c

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2
   3 #include <baseboard/gpio.h>
   4 #include <baseboard/variants.h>
   5 #include <commonlib/helpers.h>
   6 #include <soc/gpio.h>
   7
   8 /* Pad configuration in ramstage */
   9 static const struct pad_config override_gpio_table[] = {
  10         /* A21 : GPP_A21 ==> USB_C1_AUX_DC_P */
  11         PAD_CFG_GPO(GPP_A21, 0, DEEP),
  12         /* A22 : GPP_A22 ==> USB_C1_AUX_DC_N */
  13         PAD_CFG_GPO(GPP_A22, 1, DEEP),
  14
  15         /* B5  : SOC_I2C_SUB_SDA ==> NC */
  16         PAD_NC_LOCK(GPP_B5, NONE, LOCK_CONFIG),
  17         /* B6  : SOC_I2C_SUB_SCL ==> NC */
  18         PAD_NC_LOCK(GPP_B6, NONE, LOCK_CONFIG),
  19
  20         /* C1  : SMBDATA ==> TCHSCR_RST_L */
  21         PAD_CFG_GPO(GPP_C1, 1, DEEP),
  22
  23         /* D3  : WCAM_RST_L ==> NC */
  24         PAD_NC_LOCK(GPP_D3, NONE, LOCK_CONFIG),
  25         /* D8  : SRCCLKREQ3# ==> NC */
  26         PAD_NC(GPP_D8, NONE),
  27         /* D15 : EN_PP2800_WCAM_X ==> NC */
  28         PAD_NC_LOCK(GPP_D15, NONE, LOCK_CONFIG),
  29         /* D16 : EN_PP1800_PP1200_WCAM_X ==> NC */
  30         PAD_NC_LOCK(GPP_D16, NONE, LOCK_CONFIG),
  31
  32         /* E20 : DDP2_CTRLCLK ==> NC  */
  33         PAD_NC(GPP_E20, NONE),
  34
  35         /* F6  : CNV_PA_BLANKING ==> NC */
  36         PAD_NC(GPP_F6, NONE),
  37         /* F12 : GSXDOUT ==> NC */
  38         PAD_NC_LOCK(GPP_F12, NONE, LOCK_CONFIG),
  39         /* F13 : GSXSLOAD ==> NC */
  40         PAD_NC(GPP_F13, NONE),
  41         /* F15 : GSXSRESET# ==> NC */
  42         PAD_NC_LOCK(GPP_F15, NONE, LOCK_CONFIG),
  43
  44         /* H8  : CNV_MFUART2_RXD ==> NC */
  45         PAD_NC(GPP_H8, NONE),
  46         /* H9  : CNV_MFUART2_TXD ==> NC */
  47         PAD_NC(GPP_H9, NONE),
  48         /* H12 : UART0_RTS# ==> NC */
  49         PAD_NC_LOCK(GPP_H12, NONE, LOCK_CONFIG),
  50         /* H13 : UART0_CTS# ==> NC */
  51         PAD_NC_LOCK(GPP_H13, NONE, LOCK_CONFIG),
  52         /* H19 : SRCCLKREQ4# ==> NC */
  53         PAD_NC(GPP_H19, NONE),
  54         /* H23 : GPP_H23 ==> NC */
  55         PAD_NC(GPP_H23, NONE),
  56
  57         /* R6 : DMIC_CLK_A_1A ==> NC */
  58         PAD_NC(GPP_R6, NONE),
  59         /* R7 : DMIC_DATA_1A ==> NC */
  60         PAD_NC(GPP_R7, NONE),
  61 };
  62
  63 /* Early pad configuration in bootblock */
  64 static const struct pad_config early_gpio_table[] = {
  65         /* H20 : IMGCLKOUT1 ==> WLAN_PERST_L */
  66         PAD_CFG_GPO(GPP_H20, 0, DEEP),
  67         /* A13 : GPP_A13 ==> GSC_SOC_INT_ODL */
  68         PAD_CFG_GPI_APIC(GPP_A13, NONE, PLTRST, LEVEL, INVERT),
  69         /* E12 : THC0_SPI1_IO1 ==> SOC_WP_OD */
  70         PAD_CFG_GPI_GPIO_DRIVER(GPP_E12, NONE, DEEP),
  71         /* F18 : THC1_SPI2_INT# ==> EC_IN_RW_OD */
  72         PAD_CFG_GPI(GPP_F18, NONE, DEEP),
  73         /* H4  : I2C0_SDA ==> SOC_I2C_GSC_SDA */
  74         PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1),
  75         /* H5  : I2C0_SCL ==> SOC_I2C_GSC_SCL */
  76         PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1),
  77         /* H10 : UART0_RXD ==> UART_SOC_RX_DBG_TX */
  78         PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2),
  79         /* H11 : UART0_TXD ==> UART_SOC_TX_DBG_RX */
  80         PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2),
  81         /* B11 : PMCALERT# ==> EN_PP3300_WLAN_X */
  82         PAD_CFG_GPO(GPP_B11, 1, DEEP),
  83 };
  84
  85 static const struct pad_config romstage_gpio_table[] = {
  86         /* Enable touchscreen, hold in reset */
  87         /* C0  : SMBCLK ==> EN_PP3300_TCHSCR_X */
  88         PAD_CFG_GPO(GPP_C0, 1, DEEP),
  89         /* C1  : SMBDATA ==> TCHSCR_RST_L */
  90         PAD_CFG_GPO(GPP_C1, 0, DEEP),
  91         /* H20 : IMGCLKOUT1 ==> WLAN_PERST_L */
  92         PAD_CFG_GPO(GPP_H20, 1, DEEP),
  93 };
  94
  95 const struct pad_config *variant_gpio_override_table(size_t *num)
  96 {
  97         *num = ARRAY_SIZE(override_gpio_table);
  98         return override_gpio_table;
  99 }
 100
 101 const struct pad_config *variant_early_gpio_table(size_t *num)
 102 {
 103         *num = ARRAY_SIZE(early_gpio_table);
 104         return early_gpio_table;
 105 }
 106
 107 const struct pad_config *variant_romstage_gpio_table(size_t *num)
 108 {
 109         *num = ARRAY_SIZE(romstage_gpio_table);
 110         return romstage_gpio_table;
 111 }