7 option THERMAL_FANLESS
0
11 option WIFI_GFP2_SAR_ID_0
0
12 option WIFI_GFP2_SAR_ID_1
1
16 chip soc
/intel
/alderlake
17 register
"sagv" = "SaGv_Enabled"
20 register
"acoustic_noise_mitigation" = "1"
21 register
"slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8"
22 register
"slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_8"
23 register
"fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1"
24 register
"fast_pkg_c_ramp_disable[VR_DOMAIN_GT]" = "1"
27 # Refer
to EDS
-Vol2
-42.3.7.
28 #
[14:8] steps of delay
for DDR mode
, each
125ps
, range
: 0 - 39.
29 #
[6:0] steps of delay
for SDR mode
, each
125ps
, range
: 0 - 39.
30 register
"common_soc_config.emmc_dll.emmc_tx_cmd_cntl" = "0x505"
32 # EMMC TX DATA Delay
1
33 # Refer
to EDS
-Vol2
-42.3.8.
34 #
[14:8] steps of delay
for HS400
, each
125ps
, range
: 0 - 78.
35 #
[6:0] steps of delay
for SDR104
/HS200
, each
125ps
, range
: 0 - 79.
36 register
"common_soc_config.emmc_dll.emmc_tx_data_cntl1" = "0x909"
38 # EMMC TX DATA Delay
2
39 # Refer
to EDS
-Vol2
-42.3.9.
40 #
[30:24] steps of delay
for SDR50
, each
125ps
, range
: 0 - 79.
41 #
[22:16] steps of delay
for DDR50
, each
125ps
, range
: 0 - 78.
42 #
[14:8] steps of delay
for SDR25
/HS50
, each
125ps
, range
: 0 -79.
43 #
[6:0] steps of delay
for SDR12
, each
125ps. Range
: 0 - 79.
44 register
"common_soc_config.emmc_dll.emmc_tx_data_cntl2" = "0x1C272828"
46 # EMMC RX CMD
/DATA Delay
1
47 # Refer
to EDS
-Vol2
-42.3.10.
48 #
[30:24] steps of delay
for SDR50
, each
125ps
, range
: 0 - 119.
49 #
[22:16] steps of delay
for DDR50
, each
125ps
, range
: 0 - 78.
50 #
[14:8] steps of delay
for SDR25
/HS50
, each
125ps
, range
: 0 - 119.
51 #
[6:0] steps of delay
for SDR12
, each
125ps
, range
: 0 - 119.
52 register
"common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl1" = "0x1C171733"
54 # EMMC RX CMD
/DATA Delay
2
55 # Refer
to EDS
-Vol2
-42.3.12.
56 #
[17:16] stands
for Rx Clock before Output Buffer
,
57 #
00: Rx clock after output buffer
,
58 #
01: Rx clock before output buffer
,
59 #
10: Automatic selection based on working mode.
61 #
[14:8] steps of delay
for Auto Tuning Mode
, each
125ps
, range
: 0 - 39.
62 #
[6:0] steps of delay
for HS200
, each
125ps
, range
: 0 - 79.
63 register
"common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl2" = "0x10028"
65 # EMMC Rx Strobe Delay
66 # Refer
to EDS
-Vol2
-42.3.11.
67 #
[14:8] Rx Strobe Delay DLL
1(HS400 Mode
), each
125ps
, range
: 0 - 39.
68 #
[6:0] Rx Strobe Delay DLL
2(HS400 Mode
), each
125ps
, range
: 0 - 39.
69 register
"common_soc_config.emmc_dll.emmc_rx_strobe_cntl" = "0x1414"
71 # Bit
0 - C0 has no redriver
, so enable SBU muxing in the SoC.
72 # Bit
2 - C1 has a redriver which does SBU muxing.
73 # Bit
1,3 - AUX lines are
not swapped on the motherboard
for either C0
or C1.
74 register
"tcss_aux_ori" = "1"
76 register
"typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}"
78 register
"usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # UFC
79 register
"usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port
for PCIe WLAN
80 register
"usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port
for CNVi WLAN
82 # Configure external V1P05
/Vnn
/VnnSx Rails
83 register
"ext_fivr_settings" = "{
84 .configure_ext_fivr = 1,
87 # Intel Common SoC Config
88 #
+-------------------+---------------------------+
90 #
+-------------------+---------------------------+
91 #| I2C0 | TPM. Early init is |
92 #| | required
to set up a BAR |
93 #| |
for TPM communication |
94 #| I2C1 | Touchscreen |
95 #| I2C2 |
Sub-board
(PSensor
)/WCAM |
98 #
+-------------------+---------------------------+
99 register
"common_soc_config" = "{
102 .speed = I2C_SPEED_FAST_PLUS,
104 .speed = I2C_SPEED_FAST_PLUS,
111 .speed = I2C_SPEED_FAST,
113 .speed = I2C_SPEED_FAST,
120 .speed = I2C_SPEED_FAST,
122 .speed = I2C_SPEED_FAST,
129 .speed = I2C_SPEED_FAST,
131 .speed = I2C_SPEED_FAST,
141 register
"power_limits_config[ADL_N_081_15W_CORE]" = "{
142 .tdp_pl1_override = 20,
143 .tdp_pl2_override = 35,
146 register
"power_limits_config[ADL_N_041_6W_CORE]" = "{
147 .tdp_pl1_override = 10,
148 .tdp_pl2_override = 25,
152 register
"power_limits_config[ADL_N_021_6W_CORE]" = "{
153 .tdp_pl1_override = 10,
154 .tdp_pl2_override = 25,
160 chip drivers
/intel
/dptf
161 ## sensor information
162 register
"options.tsr[0].desc" = ""Memory
""
163 register
"options.tsr[1].desc" = ""Charger
""
164 register
"options.tsr[2].desc" = ""Ambient
""
166 # TODO
: below values are initial reference values only
168 register
"policies.passive" = "{
169 [0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
170 [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 65, 5000),
171 [2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_1, 65, 5000),
172 [3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 65, 5000),
176 register
"policies.critical" = "{
177 [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
178 [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 75, SHUTDOWN),
179 [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 75, SHUTDOWN),
180 [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 75, SHUTDOWN),
183 register
"controls.power_limits" = "{
187 .time_window_min = 28 * MSECS_PER_SEC,
188 .time_window_max = 32 * MSECS_PER_SEC,
194 .time_window_min = 28 * MSECS_PER_SEC,
195 .time_window_max = 32 * MSECS_PER_SEC,
200 ## Charger Performance
Control (Control, mA
)
201 register
"controls.charger_perf" = "{
208 register
"oem_data.oem_variables" = "{
212 device generic
0 alias dptf_policy on
end
216 chip drivers
/i2c
/generic
217 register
"hid" = ""ELAN0001
""
218 register
"desc" = ""ELAN Touchscreen
""
219 register
"irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
220 register
"detect" = "1"
221 register
"reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
222 register
"reset_delay_ms" = "20"
223 register
"reset_off_delay_ms" = "2"
224 register
"stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
225 register
"stop_delay_ms" = "280"
226 register
"stop_off_delay_ms" = "2"
227 register
"enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
228 register
"enable_delay_ms" = "1"
229 register
"has_power_resource" = "1"
233 register
"generic.hid" = ""ELAN2513
""
234 register
"generic.desc" = ""ELAN Touchscreen
""
235 register
"generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
236 register
"generic.detect" = "1"
237 register
"generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
238 register
"generic.reset_delay_ms" = "20"
239 register
"generic.reset_off_delay_ms" = "2"
240 register
"generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
241 register
"generic.stop_delay_ms" = "280"
242 register
"generic.stop_off_delay_ms" = "2"
243 register
"generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
244 register
"generic.enable_delay_ms" = "1"
245 register
"generic.has_power_resource" = "1"
246 register
"hid_desc_reg_offset" = "0x01"
250 register
"generic.hid" = ""GTCH7503
""
251 register
"generic.desc" = ""G2TOUCH Touchscreen
""
252 register
"generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
253 register
"generic.detect" = "1"
254 register
"generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
255 register
"generic.reset_delay_ms" = "50"
256 register
"generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
257 register
"generic.stop_delay_ms" = "30"
258 register
"generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
259 register
"generic.enable_delay_ms" = "1"
260 register
"generic.has_power_resource" = "1"
261 register
"hid_desc_reg_offset" = "0x01"
265 register
"generic.hid" = ""GDIX0000
""
266 register
"generic.desc" = ""Goodix Touchscreen
""
267 register
"generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
268 register
"generic.detect" = "1"
269 register
"generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
270 register
"generic.enable_delay_ms" = "20"
271 register
"generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
272 register
"generic.reset_delay_ms" = "180"
273 register
"generic.reset_off_delay_ms" = "3"
274 register
"generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
275 register
"generic.stop_off_delay_ms" = "1"
276 register
"generic.has_power_resource" = "1"
277 register
"hid_desc_reg_offset" = "0x01"
278 device i2c
0x14 on
end
282 chip drivers
/i2c
/generic
283 register
"hid" = ""RTL5682
""
284 register
"name" = ""RT58
""
285 register
"desc" = ""Headset Codec
""
286 register
"irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
287 #
Set the jd_src
to RT5668_JD1
for jack detection
288 register
"property_count" = "2"
289 register
"property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
290 register
"property_list[0].name" = ""realtek
,jd
-src
""
291 register
"property_list[0].integer" = "1"
292 #
Set the ldo
-sel
to RT5668_JD1
for ldo output
293 register
"property_list[1].type" = "ACPI_DP_TYPE_INTEGER"
294 register
"property_list[1].name" = ""realtek
,ldo
-sel
""
295 register
"property_list[1].integer" = "3"
300 chip drivers
/i2c
/generic
301 register
"hid" = ""ELAN0000
""
302 register
"desc" = ""ELAN Touchpad
""
303 register
"irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
304 register
"wake" = "GPE0_DW2_14"
305 register
"detect" = "1"
310 chip drivers
/generic
/max98357a
311 register
"hid" = ""MX98360A
""
312 register
"sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
313 register
"sdmode_delay" = "5"
314 device generic
0 on
end
317 register
"spkr_tplg" = "max98360a"
318 register
"jack_tplg" = "rt5682"
319 register
"mic_tplg" = "_2ch_pdm0"
320 device generic
0 on
end
323 device ref pcie_rp4 on
325 register
"pch_pcie_rp[PCH_RP(4)]" = "{
328 .flags = PCIE_RP_LTR | PCIE_RP_AER,
330 chip drivers
/wifi
/generic
331 register
"wake" = "GPE0_DW1_03"
332 register
"add_acpi_dma_property" = "true"
333 device pci
00.0 on
end
336 device ref pcie_rp7 off
end # PCIE7 no SD card
337 device ref emmc on
end
339 chip drivers
/intel
/ish
340 register
"add_acpi_dma_property" = "true"
341 device generic
0 on
end
344 device ref ufs on
end
345 device ref pch_espi on
346 chip ec
/google
/chromeec
347 use conn0
as mux_conn
[0]
348 use conn1
as mux_conn
[1]
349 device pnp
0c09.0 on
end
352 device ref pmc hidden
353 chip drivers
/intel
/pmc_mux
355 chip drivers
/intel
/pmc_mux
/conn
356 use usb2_port1
as usb2_port
357 use tcss_usb3_port1
as usb3_port
358 device generic
0 alias conn0 on
end
360 chip drivers
/intel
/pmc_mux
/conn
361 use usb2_port2
as usb2_port
362 use tcss_usb3_port2
as usb3_port
363 device generic
1 alias conn1 on
370 device ref tcss_xhci on
371 chip drivers
/usb
/acpi
372 device ref tcss_root_hub on
373 chip drivers
/usb
/acpi
374 register
"desc" = ""USB3
Type-C Port C0
(MLB
)""
375 register
"type" = "UPC_TYPE_C_USB2_SS_SWITCH"
376 register
"use_custom_pld" = "true"
377 register
"custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
378 device ref tcss_usb3_port1 on
end
380 chip drivers
/usb
/acpi
381 register
"desc" = ""USB3
Type-C Port C1
(DB
)""
382 register
"type" = "UPC_TYPE_C_USB2_SS_SWITCH"
383 register
"use_custom_pld" = "true"
384 register
"custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
385 device ref tcss_usb3_port2 on
393 chip drivers
/usb
/acpi
394 device ref xhci_root_hub on
395 chip drivers
/usb
/acpi
396 register
"desc" = ""USB2
Type-C Port C0
(MLB
)""
397 register
"type" = "UPC_TYPE_C_USB2_SS_SWITCH"
398 register
"use_custom_pld" = "true"
399 register
"custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
400 device ref usb2_port1 on
end
402 chip drivers
/usb
/acpi
403 register
"desc" = ""USB2
Type-C Port C1
(DB
)""
404 register
"type" = "UPC_TYPE_C_USB2_SS_SWITCH"
405 register
"use_custom_pld" = "true"
406 register
"custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
407 device ref usb2_port2 on
411 chip drivers
/usb
/acpi
412 register
"desc" = ""USB2
Type-A Port A0
(MLB
)""
413 register
"type" = "UPC_TYPE_A"
414 register
"use_custom_pld" = "true"
415 register
"custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
416 device ref usb2_port3 on
end
418 chip drivers
/usb
/acpi
419 register
"desc" = ""USB2 UFC
""
420 register
"type" = "UPC_TYPE_INTERNAL"
421 device ref usb2_port7 on
end
423 chip drivers
/usb
/acpi
424 register
"desc" = ""USB2 Bluetooth
""
425 register
"type" = "UPC_TYPE_INTERNAL"
426 register
"reset_gpio" =
427 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
428 device ref usb2_port8 on
end
430 chip drivers
/usb
/acpi
431 register
"desc" = ""CNVi Bluetooth
""
432 register
"type" = "UPC_TYPE_INTERNAL"
433 register
"reset_gpio" =
434 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
435 device ref usb2_port10 on
end
437 chip drivers
/usb
/acpi
438 register
"desc" = ""USB3
Type-A Port A0
(MLB
)""
439 register
"type" = "UPC_TYPE_USB3_A"
440 register
"use_custom_pld" = "true"
441 register
"custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
442 device ref usb3_port1 on
end