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soc/intel/ptl: Update ME specification version to 21
[coreboot.git] / src / mainboard / google / brya / variants / omnigul / overridetree.cb
blob041680598f4306a5f06b131da9d138c5bd8d9454
1 fw_config
2 field STORAGE 2 3
3 option STORAGE_UNKNOWN 0
4 option STORAGE_UFS 1
5 option STORAGE_NVME 2
6 end
7 field WIFI_SAR_TABLE 5
8 option OMNIGUL_WIFI_SAR_0 0
9 option OMNIKNIGHT_WIFI_SAR_1 1
10 end
11 field FINGERPRINT 9
12 option DISABLE_FP 0
13 option ENABLE_FP 1
14 end
15 end
16
17 chip soc/intel/alderlake
18
19 register "sagv" = "SaGv_Enabled"
20
21 # As per Intel Advisory doc#723158, the change is required to prevent possible
22 # display flickering issue.
23 register "disable_dynamic_tccold_handshake" = "true"
24
25 # Intel Common SoC Config
26 #+-------------------+---------------------------+
27 #| Field | Value |
28 #+-------------------+---------------------------+
29 #| I2C0 | Audio |
30 #| I2C1 | cr50 TPM. Early init is |
31 #| | required to set up a BAR |
32 #| | for TPM communication |
33 #| I2C3 | TouchScreen |
34 #| I2C5 | Trackpad |
35 #+-------------------+---------------------------+
36 register "common_soc_config" = "{
37 .i2c[0] = {
38 .speed = I2C_SPEED_FAST,
39 .rise_time_ns = 650,
40 .fall_time_ns = 400,
41 .data_hold_time_ns = 50,
42 },
43 .i2c[1] = {
44 .early_init = 1,
45 .speed = I2C_SPEED_FAST,
46 .rise_time_ns = 600,
47 .fall_time_ns = 400,
48 .data_hold_time_ns = 50,
49 },
50 .i2c[3] = {
51 .speed = I2C_SPEED_FAST,
52 .rise_time_ns = 600,
53 .fall_time_ns = 400,
54 .speed_config[0] = {
55 .speed = I2C_SPEED_FAST,
56 .scl_lcnt = 190,
57 .scl_hcnt = 110,
58 .sda_hold = 40,
59 }
60 },
61 .i2c[5] = {
62 .speed = I2C_SPEED_FAST,
63 .rise_time_ns = 650,
64 .fall_time_ns = 400,
65 .speed_config[0] = {
66 .speed = I2C_SPEED_FAST,
67 .scl_lcnt = 160,
68 .scl_hcnt = 70,
69 .sda_hold = 40,
70 }
71 },
72 }"
73
74 register "serial_io_i2c_mode" = "{
75 [PchSerialIoIndexI2C0] = PchSerialIoPci,
76 [PchSerialIoIndexI2C1] = PchSerialIoPci,
77 [PchSerialIoIndexI2C2] = PchSerialIoDisabled,
78 [PchSerialIoIndexI2C3] = PchSerialIoPci,
79 [PchSerialIoIndexI2C4] = PchSerialIoDisabled,
80 [PchSerialIoIndexI2C5] = PchSerialIoPci,
81 }"
82
83 # SOC Aux orientation override:
84 # This is a bitfield that corresponds to up to 4 TCSS ports.
85 # Bits (0,1) allocated for TCSS Port1 configuration and Bits (2,3)for TCSS Port2.
86 # TcssAuxOri = 0101b
87 # Bit0,Bit2 set to "1" indicates no retimer on USBC Ports
88 # Bit1,Bit3 set to "0" indicates Aux lines are not swapped on the
89 # motherboard to USBC connector
90 register "tcss_aux_ori" = "1"
91 register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}"
92
93 register "usb2_ports[2]" = "USB2_PORT_EMPTY" # Disable USB2 Port 2
94 register "usb2_ports[3]" = "USB2_PORT_EMPTY" # Disable USB2 Port 3
95 register "usb2_ports[4]" = "USB2_PORT_EMPTY" # Disable USB2 Port 4
96 register "usb2_ports[6]" = "USB2_PORT_EMPTY" # Disable USB2 Port 6
97 register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port A0
98 register "usb2_ports[8]" = "USB2_PORT_EMPTY" # Disable USB2 Port 8
99
100 register "usb3_ports[0]" = "USB3_PORT_EMPTY" # Disable USB3 Port 0
101 register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type A MLB port
102 register "usb3_ports[2]" = "USB3_PORT_EMPTY" # Disable USB3 Port 2
103 register "usb3_ports[3]" = "USB3_PORT_EMPTY" # Disable USB3 Port 3
104
105 register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC0)" # Type C port C0
106 register "tcss_ports[1]" = "TCSS_PORT_EMPTY" # Disable Port1
107 register "tcss_ports[2]" = "TCSS_PORT_DEFAULT(OC1)" # Type C port C1
108 register "tcss_ports[3]" = "TCSS_PORT_EMPTY" # Disable Port3
109
110 # FIVR configurations for brya are disabled since the board doesn't have V1p05 and Vnn
111 # bypass rails implemented.
112 register "ext_fivr_settings" = "{
113 .configure_ext_fivr = 1,
114 }"
115
116 # Enable the Cnvi BT Audio Offload
117 register "cnvi_bt_audio_offload" = "1"
118
119 register "power_limits_config[ADL_P_142_242_282_15W_CORE]" = "{
120 .tdp_pl1_override = 25,
121 .tdp_pl2_override = 55,
122 .tdp_pl4 = 123,
123 }"
124 register "power_limits_config[RPL_P_282_242_142_15W_CORE]" = "{
125 .tdp_pl1_override = 25,
126 .tdp_pl2_override = 55,
127 .tdp_pl4 = 114,
128 }"
129
130 register "tcc_offset" = "8"
131
132 device domain 0 on
133 device ref igpu on
134 chip drivers/gfx/generic
135 register "device_count" = "6"
136 # DDIA for eDP
137 register "device[0].name" = ""LCD0""
138 # Internal panel on the first port of the graphics chip
139 register "device[0].type" = "panel"
140 # DDIB for HDMI
141 register "device[1].name" = ""DD01""
142 # TCP0 (DP-1) for port C0
143 register "device[2].name" = ""DD02""
144 register "device[2].use_pld" = "true"
145 register "device[2].pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 1))"
146 # TCP1 (DP-2) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP1
147 register "device[3].name" = ""DD03""
148 # TCP2 (DP-3) for port C1
149 register "device[4].name" = ""DD04""
150 register "device[4].use_pld" = "true"
151 register "device[4].pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(2, 1))"
152 # TCP3 (DP-4) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP3
153 register "device[5].name" = ""DD05""
154 device generic 0 on end
155 end
156 end # Integrated Graphics Device
157 device ref dtt on
158 chip drivers/intel/dptf
159 ## sensor information
160 register "options.tsr[0].desc" = ""DRAM_SOC""
161 register "options.tsr[1].desc" = ""Ambient""
162 register "options.tsr[2].desc" = ""Charger""
163
164 ## Active Policy
165 register "policies.active" = "{
166 [0] = {
167 .target = DPTF_CPU,
168 .thresholds = {
169 TEMP_PCT(95, 100),
170 TEMP_PCT(52, 46),
171 TEMP_PCT(46, 40),
172 TEMP_PCT(41, 35),
173 TEMP_PCT(40, 28),
174 TEMP_PCT(34, 26),
175 }
176 },
177 [1] = {
178 .target = DPTF_TEMP_SENSOR_1,
179 .thresholds = {
180 TEMP_PCT(60, 100),
181 TEMP_PCT(55, 46),
182 TEMP_PCT(49, 40),
183 TEMP_PCT(45, 35),
184 TEMP_PCT(40, 28),
185 TEMP_PCT(35, 26),
186 }
187 }
188 }"
189
190 ## Passive Policy
191 register "policies.passive" = "{
192 [0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
193 [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 70, 5000),
194 [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 70, 5000),
195 [3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 70, 5000),
196 }"
197
198 ## Critical Policy
199 register "policies.critical" = "{
200 [0] = DPTF_CRITICAL(CPU, 100, SHUTDOWN),
201 [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 85, SHUTDOWN),
202 [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 85, SHUTDOWN),
203 [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 85, SHUTDOWN),
204 }"
205
206 register "controls.power_limits" = "{
207 .pl1 = {
208 .min_power = 15000,
209 .max_power = 25000,
210 .time_window_min = 28 * MSECS_PER_SEC,
211 .time_window_max = 28 * MSECS_PER_SEC,
212 .granularity = 500,
213 },
214 .pl2 = {
215 .min_power = 55000,
216 .max_power = 55000,
217 .time_window_min = 32 * MSECS_PER_SEC,
218 .time_window_max = 32 * MSECS_PER_SEC,
219 .granularity = 500,
220 }
221 }"
222
223 ## Charger Performance Control (Control, mA)
224 register "controls.charger_perf" = "{
225 [0] = { 255, 1700 },
226 [1] = { 24, 1500 },
227 [2] = { 16, 1000 },
228 [3] = { 8, 500 }
229 }"
230
231 ## Fan Performance Control (Percent, Speed, Noise, Power)
232 register "controls.fan_perf" = "{
233 [0] = { 90, 6700, 220, 2200, },
234 [1] = { 80, 5800, 180, 1800, },
235 [2] = { 70, 5000, 145, 1450, },
236 [3] = { 60, 4900, 115, 1150, },
237 [4] = { 50, 3838, 90, 900, },
238 [5] = { 40, 2904, 55, 550, },
239 [6] = { 30, 2337, 30, 300, },
240 [7] = { 20, 1608, 15, 150, },
241 [8] = { 10, 800, 10, 100, },
242 [9] = { 0, 0, 0, 50, }
243 }"
244
245 ## Fan options
246 register "options.fan.fine_grained_control" = "1"
247 register "options.fan.step_size" = "2"
248
249 device generic 0 alias dptf_policy on end
250 end
251 end
252 device ref i2c0 on
253 chip drivers/i2c/generic
254 register "hid" = ""RTL5682""
255 register "name" = ""RT58""
256 register "desc" = ""Realtek RT5682""
257 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
258 register "property_count" = "1"
259 register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
260 register "property_list[0].name" = ""realtek,jd-src""
261 register "property_list[0].integer" = "1"
262 device i2c 1a on end
263 end
264 chip drivers/generic/alc1015
265 register "hid" = ""RTL1019""
266 register "sdb" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
267 device generic 1 on end
268 end
269 end #I2C0
270 device ref i2c1 on
271 chip drivers/i2c/tpm
272 register "hid" = ""GOOG0005""
273 register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_A13_IRQ)"
274 device i2c 50 on end
275 end
276 end #I2C1
277 device ref i2c3 on
278 chip drivers/i2c/hid
279 register "generic.hid" = ""GTCH7503""
280 register "generic.desc" = ""G2TOUCH Touchscreen""
281 register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
282 register "generic.detect" = "1"
283 register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
284 register "generic.reset_delay_ms" = "50"
285 register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
286 register "generic.enable_delay_ms" = "1"
287 register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
288 register "generic.stop_off_delay_ms" = "2"
289 register "generic.has_power_resource" = "1"
290 register "hid_desc_reg_offset" = "0x01"
291 device i2c 40 on end
292 end
293 chip drivers/i2c/hid
294 register "generic.hid" = ""ELAN9004""
295 register "generic.desc" = ""ELAN Touchscreen""
296 register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
297 register "generic.detect" = "1"
298 register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
299 register "generic.reset_delay_ms" = "20"
300 register "generic.reset_off_delay_ms" = "2"
301 register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
302 register "generic.enable_delay_ms" = "1"
303 register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
304 register "generic.stop_delay_ms" = "150"
305 register "generic.stop_off_delay_ms" = "2"
306 register "generic.has_power_resource" = "1"
307 register "hid_desc_reg_offset" = "0x01"
308 device i2c 10 on end
309 end
310 end #I2C3
311 device ref i2c5 on
312 chip drivers/i2c/generic
313 register "hid" = ""ELAN0000""
314 register "desc" = ""ELAN Touchpad""
315 register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
316 register "wake" = "GPE0_DW2_14"
317 register "detect" = "1"
318 device i2c 15 on end
319 end
320 chip drivers/i2c/hid
321 register "generic.hid" = ""SYNA0000""
322 register "generic.cid" = ""ACPI0C50""
323 register "generic.desc" = ""Synaptics Touchpad""
324 register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
325 register "generic.wake" = "GPE0_DW2_14"
326 register "generic.detect" = "1"
327 register "hid_desc_reg_offset" = "0x20"
328 device i2c 2c on end
329 end
330 end #I2C5
331 device ref gspi1 on
332 chip drivers/spi/acpi
333 register "name" = ""CRFP""
334 register "hid" = "ACPI_DT_NAMESPACE_HID"
335 register "uid" = "1"
336 register "compat_string" = ""google,cros-ec-spi""
337 register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F15_IRQ)"
338 register "wake" = "GPE0_DW2_15"
339 register "has_power_resource" = "1"
340 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)"
341 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)"
342 register "enable_delay_ms" = "3"
343 device spi 0 hidden
344 probe FINGERPRINT ENABLE_FP
345 end
346 end # FPMCU
347 end
348 device ref pcie_rp8 off end
349 device ref pcie_rp9 on
350 # Enable NVMe PCIE 9 using clk 1
351 register "pch_pcie_rp[PCH_RP(9)]" = "{
352 .clk_src = 1,
353 .clk_req = 1,
354 .flags = PCIE_RP_LTR | PCIE_RP_AER,
355 }"
356 probe STORAGE STORAGE_UNKNOWN
357 probe STORAGE STORAGE_NVME
358 end
359 device ref ish on
360 chip drivers/intel/ish
361 register "add_acpi_dma_property" = "true"
362 device generic 0 on end
363 end
364 probe STORAGE STORAGE_UNKNOWN
365 probe STORAGE STORAGE_UFS
366 end
367 device ref ufs on
368 probe STORAGE STORAGE_UNKNOWN
369 probe STORAGE STORAGE_UFS
370 end
371 device ref tbt_pcie_rp0 off end
372 device ref tbt_pcie_rp1 off end
373 device ref tbt_pcie_rp2 off end
374 device ref tcss_dma0 off end
375 device ref tcss_dma1 off end
376 device ref pch_espi on
377 chip ec/google/chromeec
378 use conn0 as mux_conn[0]
379 use conn1 as mux_conn[1]
380 device pnp 0c09.0 on end
381 end
382 end
383 device ref pmc hidden
384 chip drivers/intel/pmc_mux
385 device generic 0 on
386 chip drivers/intel/pmc_mux/conn
387 use usb2_port1 as usb2_port
388 use tcss_usb3_port1 as usb3_port
389 device generic 0 alias conn0 on end
390 end
391 chip drivers/intel/pmc_mux/conn
392 use usb2_port2 as usb2_port
393 use tcss_usb3_port3 as usb3_port
394 device generic 1 alias conn1 on end
395 end
396 end
397 end
398 end
399 device ref tcss_xhci on
400 chip drivers/usb/acpi
401 device ref tcss_root_hub on
402 chip drivers/usb/acpi
403 register "desc" = ""USB3 Type-C Port C0 (MLB)""
404 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
405 register "use_custom_pld" = "true"
406 register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 1))"
407 device ref tcss_usb3_port1 on end
408 end
409 chip drivers/usb/acpi
410 register "desc" = ""USB3 Type-C Port C1 (DB)""
411 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
412 register "use_custom_pld" = "true"
413 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(2, 1))"
414 register "usb_lpm_incapable" = "true"
415 device ref tcss_usb3_port3 on end
416 end
417 end
418 end
419 end
420 device ref xhci on
421 chip drivers/usb/acpi
422 device ref xhci_root_hub on
423 chip drivers/usb/acpi
424 register "desc" = ""USB2 Type-C Port C0 (MLB)""
425 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
426 register "use_custom_pld" = "true"
427 register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 1))"
428 device ref usb2_port1 on end
429 end
430 chip drivers/usb/acpi
431 register "desc" = ""USB2 Type-C Port C1 (DB)""
432 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
433 register "use_custom_pld" = "true"
434 register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
435 device ref usb2_port2 on end
436 end
437 chip drivers/usb/acpi
438 register "desc" = ""USB2 Camera""
439 register "type" = "UPC_TYPE_INTERNAL"
440 device ref usb2_port6 on end
441 end
442 chip drivers/usb/acpi
443 register "desc" = ""USB2 Type-A Port A0 (MLB)""
444 register "type" = "UPC_TYPE_A"
445 register "use_custom_pld" = "true"
446 register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 2))"
447 device ref usb2_port8 on end
448 end
449 chip drivers/usb/acpi
450 register "desc" = ""USB2 Bluetooth""
451 register "type" = "UPC_TYPE_INTERNAL"
452 register "reset_gpio" =
453 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
454 device ref usb2_port10 on end
455 end
456 chip drivers/usb/acpi
457 register "desc" = ""USB3 Type-A Port A0 (MLB)""
458 register "type" = "UPC_TYPE_USB3_A"
459 register "use_custom_pld" = "true"
460 register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 2))"
461 device ref usb3_port1 on end
462 end
463 end
464 end
465 end
466 end
467 end
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