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soc/intel/ptl: Update ME specification version to 21
[coreboot.git] / src / mainboard / google / brya / variants / taniks / overridetree.cb
blob9d89cd58cacb21b088c71ceaefa8328d80658171
1 fw_config
2 field DB_USB 0 1
3 option DB_USB_ABSENT 0
4 option DB_USB3_WITH_A 1
5 end
6 field DB_SD 2 3
7 option DB_SD_ABSENT 0
8 option DB_SD_OZ711LV2LN 1
9 option DB_SD_GL9750 2
10 option DB_SD_RTS5232S 3
11 end
12 field KB_BL 4
13 option KB_BL_ABSENT 0
14 option KB_BL_PRESENT 1
15 end
16 field AUDIO 5 7
17 option AUDIO_UNKNOWN 0
18 option AUDIO_MAX98357_ALC5682I_I2S_2WAY 1
19 end
20 field KB_LAYOUT 8 9
21 option KB_LAYOUT_DEFAULT 0
22 end
23 field WIFI_SAR_ID 10 11
24 option WIFI_SAR_ID_0 0
25 option WIFI_SAR_ID_1 1
26 option WIFI_SAR_ID_2 2
27 option WIFI_SAR_ID_3 3
28 end
29 field BOOT_NVME_MASK 12
30 option BOOT_NVME_DISABLED 0
31 option BOOT_NVME_ENABLED 1
32 end
33 field BOOT_EMMC_MASK 13
34 option BOOT_EMMC_DISABLED 0
35 option BOOT_EMMC_ENABLED 1
36 end
37 end
38 chip soc/intel/alderlake
39 # As per Intel Advisory doc#723158, the change is required to prevent possible
40 # display flickering issue.
41 register "usb2_phy_sus_pg_disable" = "1"
42
43 # Acoustic settings
44 register "acoustic_noise_mitigation" = "1"
45 register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8"
46 register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_8"
47 register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1"
48 register "fast_pkg_c_ramp_disable[VR_DOMAIN_GT]" = "1"
49 register "PreWake" = "100"
50 register "ext_fivr_settings" = "{
51 .configure_ext_fivr = 1,
52 .v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX,
53 .vnn_enable_bitmap = FIVR_ENABLE_ALL_SX,
54 .v1p05_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL |
55 FIVR_VOLTAGE_MIN_ACTIVE |
56 FIVR_VOLTAGE_MIN_RETENTION,
57 .vnn_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL |
58 FIVR_VOLTAGE_MIN_ACTIVE |
59 FIVR_VOLTAGE_MIN_RETENTION,
60 .v1p05_icc_max_ma = 500,
61 .vnn_sx_voltage_mv = 1250,
62 }"
63 register "tcss_aux_ori" = "1"
64 register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}"
65 register "sagv" = "SaGv_Enabled"
66
67 register "platform_pmax" = "145"
68
69 register "usb2_ports[1]" = "USB2_PORT_EMPTY" # Disable Port 1
70 register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC2)" # DB USB2_C1
71 register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" #DB Type-A Port A1
72 register "usb2_ports[3]" = "USB2_PORT_EMPTY" # Disable M.2 WWAN
73
74 register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC4)" # USB3/2 Type A port A1
75 register "usb3_ports[3]" = "USB3_PORT_EMPTY" # Disable M.2 WWAN
76
77 # Intel Common SoC Config
78 #+-------------------+---------------------------+
79 #| Field | Value |
80 #+-------------------+---------------------------+
81 #| I2C0 | Audio |
82 #| I2C1 | cr50 TPM. Early init is |
83 #| | required to set up a BAR |
84 #| | for TPM communication |
85 #| I2C3 | Touchscreen |
86 #| I2C5 | Trackpad |
87 #+-------------------+---------------------------+
88 register "common_soc_config" = "{
89 .i2c[0] = {
90 .speed = I2C_SPEED_FAST,
91 },
92 .i2c[1] = {
93 .early_init = 1,
94 .speed = I2C_SPEED_FAST,
95 .rise_time_ns = 600,
96 .fall_time_ns = 400,
97 .data_hold_time_ns = 50,
98 },
99 .i2c[3] = {
100 .early_init = 1,
101 .speed = I2C_SPEED_FAST,
102 },
103 .i2c[5] = {
104 .speed = I2C_SPEED_FAST,
105 },
106 }"
107 # I2C Port Config
108 register "serial_io_i2c_mode" = "{
109 [PchSerialIoIndexI2C0] = PchSerialIoPci,
110 [PchSerialIoIndexI2C1] = PchSerialIoPci,
111 [PchSerialIoIndexI2C2] = PchSerialIoDisabled,
112 [PchSerialIoIndexI2C3] = PchSerialIoPci,
113 [PchSerialIoIndexI2C4] = PchSerialIoDisabled,
114 [PchSerialIoIndexI2C5] = PchSerialIoPci,
115 }"
116 device domain 0 on
117 device ref igpu on
118 chip drivers/gfx/generic
119 register "device_count" = "3"
120 # DDIA for eDP
121 register "device[0].name" = ""LCD0""
122 # Internal panel on the first port of the graphics chip
123 register "device[0].type" = "panel"
124 # DDIB is unused and HDMI is not enumerated in the kernel, so no GFX device is added for DDIB
125 # TCP0 (DP-1) for port C0
126 register "device[1].name" = ""DD01""
127 register "device[1].use_pld" = "true"
128 register "device[1].pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
129 # TCP1 is unused and not enumerated in the kernel, so no GFX device is added for TCP1
130 # TCP2 (DP-2) for port C1
131 register "device[2].name" = ""DD02""
132 register "device[2].use_pld" = "true"
133 register "device[2].pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
134 # TCP3 is unused and not enumerated in the kernel, so no GFX device is added for TCP3
135 device generic 0 on end
136 end
137 end # Integrated Graphics Device
138 device ref dtt on
139 chip drivers/intel/dptf
140 ## sensor information
141 register "options.tsr[0].desc" = ""DRAM_SOC""
142 register "options.tsr[1].desc" = ""Ambient""
143 register "options.tsr[2].desc" = ""Charger""
144
145 # TODO: below values are initial reference values only
146 ## Active Policy
147 register "policies.active" = "{
148 [0] = {
149 .target = DPTF_CPU,
150 .thresholds = {
151 TEMP_PCT(60, 68),
152 TEMP_PCT(56, 50),
153 TEMP_PCT(52, 50),
154 TEMP_PCT(46, 40),
155 TEMP_PCT(42, 40),
156 }
157 },
158 [1] = {
159 .target = DPTF_TEMP_SENSOR_1,
160 .thresholds = {
161 TEMP_PCT(60, 68),
162 TEMP_PCT(56, 50),
163 TEMP_PCT(52, 50),
164 TEMP_PCT(46, 40),
165 TEMP_PCT(42, 40),
166 }
167 },
168 [2] = {
169 .target = DPTF_TEMP_SENSOR_2,
170 .thresholds = {
171 TEMP_PCT(60, 68),
172 TEMP_PCT(56, 50),
173 TEMP_PCT(52, 50),
174 TEMP_PCT(46, 40),
175 TEMP_PCT(42, 40),
176 }
177 },
178 }"
179
180 ## Passive Policy
181 register "policies.passive" = "{
182 [0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
183 [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 90, 6000),
184 [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 90, 6000),
185 [3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 90, 6000),
186 }"
187
188 ## Critical Policy
189 register "policies.critical" = "{
190 [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
191 [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 100, SHUTDOWN),
192 [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 100, SHUTDOWN),
193 [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 100, SHUTDOWN),
194 }"
195
196 register "controls.power_limits" = "{
197 .pl1 = {
198 .min_power = 3000,
199 .max_power = 15000,
200 .time_window_min = 28 * MSECS_PER_SEC,
201 .time_window_max = 32 * MSECS_PER_SEC,
202 .granularity = 200,
203 },
204 .pl2 = {
205 .min_power = 55000,
206 .max_power = 55000,
207 .time_window_min = 28 * MSECS_PER_SEC,
208 .time_window_max = 32 * MSECS_PER_SEC,
209 .granularity = 1000,
210 }
211 }"
212
213 ## Charger Performance Control (Control, mA)
214 register "controls.charger_perf" = "{
215 [0] = { 255, 1700 },
216 [1] = { 24, 1500 },
217 [2] = { 16, 1000 },
218 [3] = { 8, 500 }
219 }"
220
221 ## Fan Performance Control (Percent, Speed, Noise, Power)
222 register "controls.fan_perf" = "{
223 [0] = { 100, 6000, 220, 2200, },
224 [1] = { 92, 5500, 180, 1800, },
225 [2] = { 78, 4500, 145, 1450, },
226 [3] = { 68, 3900, 115, 1150, },
227 [4] = { 60, 3600, 90, 900, },
228 [5] = { 50, 3200, 55, 550, },
229 [6] = { 40, 2800, 30, 300, },
230 [7] = { 33, 2500, 15, 150, },
231 [8] = { 12, 800, 10, 100, },
232 [9] = { 0, 0, 0, 50, }
233 }"
234
235 ## Fan options
236 register "options.fan.fine_grained_control" = "1"
237 register "options.fan.step_size" = "2"
238
239 device generic 0 alias dptf_policy on end
240 end
241 end
242 device ref pcie4_0 on
243 # Enable CPU PCIE RP 1 using CLK 0
244 register "cpu_pcie_rp[CPU_RP(1)]" = "{
245 .clk_req = 0,
246 .clk_src = 0,
247 .flags = PCIE_RP_LTR | PCIE_RP_AER,
248 }"
249 probe BOOT_NVME_MASK BOOT_NVME_ENABLED
250 end
251 device ref tbt_pcie_rp0 off end
252 device ref tbt_pcie_rp1 off end
253 device ref tbt_pcie_rp2 off end
254 device ref i2c0 on
255 chip drivers/i2c/generic
256 register "hid" = ""10EC5682""
257 register "name" = ""RT58""
258 register "desc" = ""Headset Codec""
259 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
260 # Set the jd_src to RT5668_JD1 for jack detection
261 register "property_count" = "1"
262 register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
263 register "property_list[0].name" = ""realtek,jd-src""
264 register "property_list[0].integer" = "1"
265 device i2c 1a on
266 probe AUDIO AUDIO_MAX98357_ALC5682I_I2S_2WAY
267 end
268 end
269 end
270 device ref i2c1 on
271 chip drivers/i2c/tpm
272 register "hid" = ""GOOG0005""
273 register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_A13_IRQ)"
274 device i2c 50 on end
275 end
276 end
277 device ref i2c3 on
278 chip drivers/i2c/hid
279 register "generic.hid" = ""GDIX0000""
280 register "generic.desc" = ""Goodix Touchscreen""
281 register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
282 register "generic.detect" = "1"
283 register "generic.reset_gpio" =
284 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
285 # Parameter T5 >= 180ms
286 register "generic.reset_delay_ms" = "180"
287 # Parameter T2 >= 1ms
288 register "generic.reset_off_delay_ms" = "3"
289 register "generic.enable_gpio" =
290 "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
291 # Parameter T1 >= 20ms
292 register "generic.enable_delay_ms" = "20"
293 register "generic.stop_gpio" =
294 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E3)"
295 # Parameter T4 >= 1ms
296 register "generic.stop_off_delay_ms" = "1"
297 register "generic.has_power_resource" = "1"
298 register "hid_desc_reg_offset" = "0x01"
299 device i2c 5d on end
300 end
301 chip drivers/i2c/generic
302 register "hid" = ""ELAN0001""
303 register "desc" = ""ELAN Touchscreen""
304 register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
305 register "detect" = "1"
306 register "reset_gpio" =
307 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
308 register "reset_delay_ms" = "20"
309 register "enable_gpio" =
310 "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
311 register "enable_delay_ms" = "1"
312 register "has_power_resource" = "1"
313 device i2c 10 on end
314 end
315 end
316 device ref i2c5 on
317 chip drivers/i2c/generic
318 register "hid" = ""ELAN0000""
319 register "desc" = ""ELAN Touchpad""
320 register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
321 register "wake" = "GPE0_DW2_14"
322 register "detect" = "1"
323 device i2c 15 on end
324 end
325 chip drivers/i2c/hid
326 register "generic.hid" = ""SYNA0000""
327 register "generic.cid" = ""ACPI0C50""
328 register "generic.desc" = ""Synaptics Touchpad""
329 register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
330 register "generic.wake" = "GPE0_DW2_14"
331 register "generic.detect" = "1"
332 register "hid_desc_reg_offset" = "0x20"
333 device i2c 2c on end
334 end
335 end
336 device ref hda on
337 chip drivers/generic/max98357a
338 register "hid" = ""MX98357A""
339 register "sdmode_gpio" =
340 "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
341 register "sdmode_delay" = "5"
342 device generic 0 on
343 probe AUDIO AUDIO_MAX98357_ALC5682I_I2S_2WAY
344 end
345 end
346 chip drivers/sof
347 register "spkr_tplg" = "max98357a_tdm"
348 register "jack_tplg" = "rt5682"
349 register "mic_tplg" = "_2ch_pdm0"
350 device generic 0 on end
351 end
352 end
353 device ref pcie_rp5 on
354 chip soc/intel/common/block/pcie/rtd3
355 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B11)"
356 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H20)"
357 register "srcclk_pin" = "2"
358 device generic 0 on end
359 end
360 register "pch_pcie_rp[PCH_RP(5)]" = "{
361 .clk_src = 2,
362 .clk_req = 2,
363 .flags = PCIE_RP_LTR | PCIE_RP_AER,
364 }"
365 end
366 device ref pcie_rp6 off end
367 device ref pcie_rp8 on
368 chip soc/intel/common/block/pcie/rtd3
369 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H13)"
370 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D18)"
371 register "srcclk_pin" = "3"
372 device generic 0 on
373 probe DB_SD DB_SD_OZ711LV2LN
374 probe DB_SD DB_SD_GL9750
375 probe DB_SD DB_SD_RTS5232S
376 end
377 end
378 end
379 device ref pcie_rp9 on
380 # Enable PCIE 9 using clk 0 for eMMC
381 register "pch_pcie_rp[PCH_RP(9)]" = "{
382 .clk_src = 0,
383 .clk_req = 0,
384 .flags = PCIE_RP_LTR | PCIE_RP_AER,
385 }"
386 probe BOOT_EMMC_MASK BOOT_EMMC_ENABLED
387 end
388 device ref pch_espi on
389 chip ec/google/chromeec
390 use conn0 as mux_conn[0]
391 use conn1 as mux_conn[1]
392 device pnp 0c09.0 on end
393 end
394 end
395 device ref pmc hidden
396 chip drivers/intel/pmc_mux
397 device generic 0 on
398 chip drivers/intel/pmc_mux/conn
399 use usb2_port1 as usb2_port
400 use tcss_usb3_port1 as usb3_port
401 device generic 0 alias conn0 on end
402 end
403 chip drivers/intel/pmc_mux/conn
404 use usb2_port3 as usb2_port
405 use tcss_usb3_port3 as usb3_port
406 device generic 2 alias conn1 on end
407 end
408 end
409 end
410 end
411 device ref tcss_xhci on
412 chip drivers/usb/acpi
413 device ref tcss_root_hub on
414 chip drivers/usb/acpi
415 register "desc" = ""USB3 Type-C Port C0 (MLB)""
416 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
417 register "use_custom_pld" = "true"
418 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
419 device ref tcss_usb3_port1 on end
420 end
421 chip drivers/usb/acpi
422 register "desc" = ""USB3 Type-C Port C1 (DB)""
423 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
424 register "use_custom_pld" = "true"
425 register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
426 register "usb_lpm_incapable" = "true"
427 device ref tcss_usb3_port3 on
428 probe DB_USB DB_USB3_WITH_A
429 end
430 end
431 end
432 end
433 end
434 device ref xhci on
435 chip drivers/usb/acpi
436 device ref xhci_root_hub on
437 chip drivers/usb/acpi
438 register "desc" = ""USB2 Type-C Port C0 (MLB)""
439 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
440 register "use_custom_pld" = "true"
441 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
442 device ref usb2_port1 on end
443 end
444 chip drivers/usb/acpi
445 register "desc" = ""USB2 Type-C Port C1 (DB)""
446 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
447 register "use_custom_pld" = "true"
448 register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
449 device ref usb2_port3 on
450 probe DB_USB DB_USB3_WITH_A
451 end
452 end
453 chip drivers/usb/acpi
454 register "desc" = ""USB2 Camera""
455 register "type" = "UPC_TYPE_INTERNAL"
456 device ref usb2_port6 on
457 end
458 end
459 chip drivers/usb/acpi
460 register "desc" = ""USB2 Type-A Port (DB)""
461 register "type" = "UPC_TYPE_A"
462 register "use_custom_pld" = "true"
463 register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(3, 1))"
464 device ref usb2_port7 on
465 probe DB_USB DB_USB3_WITH_A
466 end
467 end
468 chip drivers/usb/acpi
469 register "desc" = ""USB2 Type-A Port (MLB)""
470 register "type" = "UPC_TYPE_A"
471 register "use_custom_pld" = "true"
472 register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(4, 1))"
473 device ref usb2_port9 on end
474 end
475 chip drivers/usb/acpi
476 register "desc" = ""USB2 Bluetooth""
477 register "type" = "UPC_TYPE_INTERNAL"
478 register "reset_gpio" =
479 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
480 device ref usb2_port10 on end
481 end
482 chip drivers/usb/acpi
483 register "desc" = ""USB3 Type-A Port (MLB)""
484 register "type" = "UPC_TYPE_USB3_A"
485 register "use_custom_pld" = "true"
486 register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(4, 1))"
487 device ref usb3_port1 on end
488 end
489 chip drivers/usb/acpi
490 register "desc" = ""USB3 Type-A Port (DB)""
491 register "type" = "UPC_TYPE_USB3_A"
492 register "use_custom_pld" = "true"
493 register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(3, 1))"
494 device ref usb3_port3 on
495 probe DB_USB DB_USB3_WITH_A
496 end
497 end
498 end
499 end
500 end
501 end
502 end
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