src/mainboard/google/brya/variants/xivu/gpio.c

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2
   3 #include <baseboard/gpio.h>
   4 #include <baseboard/variants.h>
   5 #include <commonlib/helpers.h>
   6 #include <soc/gpio.h>
   7
   8 /* Pad configuration in ramstage */
   9 static const struct pad_config override_gpio_table[] = {
  10         /* A20 : DDSP_HPD2 ==> NC */
  11         PAD_NC(GPP_A20, NONE),
  12         /* E20 : DDP2_CTRLCLK ==> NC */
  13         PAD_NC(GPP_E20, NONE),
  14         /* E21 : DDP2_CTRLDATA ==> NC */
  15         PAD_NC(GPP_E21, NONE),
  16         /* F0  : CNV_BRI_DT ==> NC*/
  17         PAD_NC(GPP_F0, NONE),
  18         /* F1  : CNV_BRI_RSP ==> NC */
  19         PAD_NC(GPP_F1, NONE),
  20         /* F2  : CNV_RGI_DT ==> NC */
  21         PAD_NC(GPP_F2, NONE),
  22         /* F3  : CNV_RGI_RSP ==> NC */
  23         PAD_NC(GPP_F3, NONE),
  24         /* F4  : CNV_RF_RESET# ==> NC */
  25         PAD_NC(GPP_F4, NONE),
  26         /* F5  : CRF_XTAL_CLKREQ ==> NC */
  27         PAD_NC(GPP_F5, NONE),
  28         /* R6 : DMIC_CLK_A_1A ==> NC */
  29         PAD_NC(GPP_R6, NONE),
  30         /* R7 : DMIC_DATA_1A ==> NC */
  31         PAD_NC(GPP_R7, NONE),
  32 };
  33
  34 /* Early pad configuration in bootblock */
  35 static const struct pad_config early_gpio_table[] = {
  36         /* H12 : UART0_RTS# ==> SD_PERST_L */
  37         PAD_CFG_GPO(GPP_H12, 0, DEEP),
  38         /* H20 : IMGCLKOUT1 ==> WLAN_PERST_L */
  39         PAD_CFG_GPO(GPP_H20, 0, DEEP),
  40         /* A13 : GPP_A13 ==> GSC_SOC_INT_ODL */
  41         PAD_CFG_GPI_APIC(GPP_A13, NONE, PLTRST, LEVEL, INVERT),
  42         /* E12 : THC0_SPI1_IO1 ==> SOC_WP_OD */
  43         PAD_CFG_GPI_GPIO_DRIVER(GPP_E12, NONE, DEEP),
  44         /* F18 : THC1_SPI2_INT# ==> EC_IN_RW_OD */
  45         PAD_CFG_GPI(GPP_F18, NONE, DEEP),
  46         /* H4  : I2C0_SDA ==> SOC_I2C_GSC_SDA */
  47         PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1),
  48         /* H5  : I2C0_SCL ==> SOC_I2C_GSC_SCL */
  49         PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1),
  50         /* H10 : UART0_RXD ==> UART_SOC_RX_DBG_TX */
  51         PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2),
  52         /* H11 : UART0_TXD ==> UART_SOC_TX_DBG_RX */
  53         PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2),
  54         /* H13 : UART0_CTS# ==> EN_PP3300_SD_X */
  55         PAD_CFG_GPO(GPP_H13, 1, DEEP),
  56 };
  57
  58 static const struct pad_config romstage_gpio_table[] = {
  59         /* Enable touchscreen, hold in reset */
  60         /* C0  : SMBCLK ==> EN_PP3300_TCHSCR */
  61         PAD_CFG_GPO(GPP_C0, 1, DEEP),
  62         /* C1  : SMBDATA ==> USI_RST_L */
  63         PAD_CFG_GPO(GPP_C1, 0, DEEP),
  64         /* H12 : UART0_RTS# ==> SD_PERST_L */
  65         PAD_CFG_GPO(GPP_H12, 1, DEEP),
  66         /* H20 : IMGCLKOUT1 ==> WLAN_PERST_L */
  67         PAD_CFG_GPO(GPP_H20, 1, DEEP),
  68 };
  69
  70 const struct pad_config *variant_gpio_override_table(size_t *num)
  71 {
  72         *num = ARRAY_SIZE(override_gpio_table);
  73         return override_gpio_table;
  74 }
  75
  76 const struct pad_config *variant_early_gpio_table(size_t *num)
  77 {
  78         *num = ARRAY_SIZE(early_gpio_table);
  79         return early_gpio_table;
  80 }
  81
  82
  83 const struct pad_config *variant_romstage_gpio_table(size_t *num)
  84 {
  85         *num = ARRAY_SIZE(romstage_gpio_table);
  86         return romstage_gpio_table;
  87 }