soc/intel/ptl: Update ME specification version to 21
[coreboot.git] / src / mainboard / google / gale / Kconfig
blob76ecb6541e6bc80d01c8f1893077c45b5925584a
1 ## SPDX-License-Identifier: GPL-2.0-only
3 if BOARD_GOOGLE_GALE
5 config BOARD_SPECIFIC_OPTIONS
6         def_bool y
7         select SOC_QC_IPQ40XX
8         select BOARD_ROMSIZE_KB_8192
9         select COMMON_CBFS_SPI_WRAPPER
10         select DRIVERS_I2C_WW_RING
11         select MAINBOARD_HAS_CHROMEOS
12         select SPI_FLASH
13         select SPI_FLASH_GIGADEVICE
14         select SPI_FLASH_SPANSION
15         select SPI_FLASH_STMICRO
16         select SPI_FLASH_WINBOND
17         select DRIVERS_UART
18         select I2C_TPM
19         select MAINBOARD_HAS_TPM1
21 config VBOOT
22         select VBOOT_DISABLE_DEV_ON_RECOVERY
23         select VBOOT_WIPEOUT_SUPPORTED
25 config BOARD_VARIANT_DK01
26         bool "Build an image for DK01"
27         default n
29 config MAINBOARD_DIR
30         default "google/gale"
32 config MAINBOARD_PART_NUMBER
33         default "DK01" if BOARD_VARIANT_DK01
34         default "Gale"
36 config DRAM_SIZE_MB
37         int
38         default 512 if BOARD_VARIANT_DK01
39         default 512
41 config DRIVER_TPM_I2C_BUS
42         hex
43         default 0x2
45 config DRIVER_TPM_I2C_ADDR
46         hex
47         default 0x20
49 endif # BOARD_GOOGLE_GALE