soc/intel/ptl: Update ME specification version to 21
[coreboot.git] / src / mainboard / google / gru / pwm_regulator.c
blob3aafa9eeeb99d7329a0405c0d8045671216612c2
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <device/mmio.h>
4 #include <assert.h>
5 #include <boardid.h>
6 #include <console/console.h>
7 #include <gpio.h>
8 #include <soc/grf.h>
9 #include <soc/pwm.h>
11 #include "pwm_regulator.h"
14 * Apparently a period of 3333 is determined by EEs to be ideal for our
15 * board design / resistors / capacitors / regulators but due to
16 * clock dividers we actually get 3337.
18 #define PWM_PERIOD 3337
19 #define PWM_DESIGN_VOLTAGE_MIN_OUTDATED 8000
20 #define PWM_DESIGN_VOLTAGE_MAX_OUTDATED 15000
22 /* Applies for Kevin rev6+ */
23 int kevin6_pwm_design_voltage[][2] = {
24 [PWM_REGULATOR_GPU] = {7858, 12177},
25 [PWM_REGULATOR_BIG] = {7987, 13022},
26 [PWM_REGULATOR_LIT] = {7991, 13037},
27 [PWM_REGULATOR_CENTERLOG] = {8001, 10497}
30 /* Applies for Gru rev2+, Bob, and Nefario. */
31 int pwm_design_voltage[][2] = {
32 [PWM_REGULATOR_GPU] = {7864, 12177},
33 [PWM_REGULATOR_BIG] = {8001, 13022},
34 [PWM_REGULATOR_LIT] = {7977, 13078},
35 [PWM_REGULATOR_CENTERLOG] = {7994, 10499}
38 /* Applies for Scarlet-based boards. */
39 int scarlet_pwm_design_voltage[][2] = {
40 [PWM_REGULATOR_GPU] = {7996, 10990},
41 [PWM_REGULATOR_BIG] = {8000, 12992},
42 [PWM_REGULATOR_LIT] = {8021, 11996},
45 int pwm_enum_to_pwm_number[] = {
46 [PWM_REGULATOR_GPU] = 0,
47 [PWM_REGULATOR_LIT] = 2,
48 #if CONFIG(GRU_HAS_CENTERLOG_PWM)
49 [PWM_REGULATOR_CENTERLOG] = 3,
50 #else
51 [PWM_REGULATOR_CENTERLOG] = -1,
52 #endif
53 #if CONFIG(GRU_BASEBOARD_SCARLET)
54 [PWM_REGULATOR_BIG] = 3,
55 #else
56 [PWM_REGULATOR_BIG] = 1,
57 #endif
60 void pwm_regulator_configure(enum pwm_regulator pwm, int millivolt)
62 int duty_ns, voltage_max, voltage_min;
63 int voltage = millivolt * 10; /* for higher calculation accuracy */
64 int pwm_number = pwm_enum_to_pwm_number[pwm];
66 voltage_min = pwm_design_voltage[pwm][0];
67 voltage_max = pwm_design_voltage[pwm][1];
68 if ((CONFIG(BOARD_GOOGLE_KEVIN) && board_id() < 6) ||
69 (CONFIG(BOARD_GOOGLE_GRU) && board_id() < 2)) {
70 voltage_min = PWM_DESIGN_VOLTAGE_MIN_OUTDATED;
71 voltage_max = PWM_DESIGN_VOLTAGE_MAX_OUTDATED;
72 } else if (CONFIG(BOARD_GOOGLE_KEVIN) && board_id() >= 6) {
73 voltage_min = kevin6_pwm_design_voltage[pwm][0];
74 voltage_max = kevin6_pwm_design_voltage[pwm][1];
75 } else if (CONFIG(GRU_BASEBOARD_SCARLET)) {
76 voltage_min = scarlet_pwm_design_voltage[pwm][0];
77 voltage_max = scarlet_pwm_design_voltage[pwm][1];
80 assert(voltage <= voltage_max && voltage >= voltage_min);
83 * Intentionally round down (higher volt) to be safe.
84 * eg, for the default min & max design voltage:
85 * period = 3337, volt = 1.1: 1906
86 * period = 3337, volt = 1.0: 2383
87 * period = 3337, volt = 0.9: 2860
89 duty_ns = PWM_PERIOD * (voltage_max - voltage)
90 / (voltage_max - voltage_min);
92 pwm_init(pwm_number, PWM_PERIOD, duty_ns);
94 switch (pwm_number) {
95 case 0:
96 gpio_input(GPIO(4, C, 2)); /* PWM0 remove pull-down */
97 write32(&rk3399_grf->iomux_pwm_0, IOMUX_PWM_0);
98 break;
99 case 1:
100 gpio_input(GPIO(4, C, 6)); /* PWM1 remove pull-down */
101 write32(&rk3399_grf->iomux_pwm_1, IOMUX_PWM_1);
102 break;
103 case 2:
104 gpio_input(GPIO(1, C, 3)); /* PWM2 remove pull-down */
105 write32(&rk3399_pmugrf->iomux_pwm_2, IOMUX_PWM_2);
106 break;
107 case 3:
108 gpio_input(GPIO(0, A, 6)); /* PWM3 remove pull-down */
109 write32(&rk3399_pmugrf->iomux_pwm_3a, IOMUX_PWM_3_A);
110 break;
111 default:
112 die("incorrect board configuration");