soc/intel/ptl: Update ME specification version to 21
[coreboot.git] / src / mainboard / google / guybrush / smihandler.c
blobb6dd8a0ee430d04acb3a43d6565beb90687c4615
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #include <baseboard/variants.h>
4 #include <console/console.h>
5 #include <cpu/x86/smm.h>
6 #include <ec/google/chromeec/ec.h>
7 #include <ec/google/chromeec/smm.h>
8 #include <variant/ec.h>
10 void mainboard_smi_gpi(u32 gpi_sts)
12 printk(BIOS_WARNING, "No GPIO is set up as PAD_SMI, so %s should never end up being "
13 "called. gpi_status is %x.\n", __func__, gpi_sts);
16 void mainboard_smi_sleep(u8 slp_typ)
18 chromeec_smi_sleep(slp_typ, MAINBOARD_EC_S3_WAKE_EVENTS, MAINBOARD_EC_S5_WAKE_EVENTS);
21 int mainboard_smi_apmc(u8 apmc)
23 chromeec_smi_apmc(apmc, MAINBOARD_EC_SCI_EVENTS, MAINBOARD_EC_SMI_EVENTS);
25 return 0;