soc/intel/ptl: Update ME specification version to 21
[coreboot.git] / src / mainboard / google / kukui / panel_anx7625.c
blob90a041b42a384ed91f799e149979b7148b472b36
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <console/console.h>
4 #include <delay.h>
5 #include <drivers/analogix/anx7625/anx7625.h>
6 #include <edid.h>
7 #include <gpio.h>
8 #include <soc/dsi.h>
9 #include <soc/i2c.h>
11 #include "panel.h"
13 #define ANX7625_I2C_BUS 4
15 static struct panel_serializable_data anx7625_data = {
16 .init = { PANEL_END },
19 static void dummy_power_on(void)
22 * The panel has been already powered on when getting panel information
23 * so we should do nothing here.
27 static void start_anx7625(void)
29 if (anx7625_dp_start(ANX7625_I2C_BUS, &anx7625_data.edid) < 0)
30 printk(BIOS_ERR, "Can't start display via ANX7625.\n");
33 static struct panel_description anx7625_panel = {
34 .s = &anx7625_data,
35 .orientation = LB_FB_ORIENTATION_NORMAL,
36 .power_on = dummy_power_on,
37 .post_power_on = start_anx7625,
40 static void power_on_anx7625(void)
42 /* Disable backlight before turning on bridge */
43 gpio_output(GPIO(PERIPHERAL_EN13), 0);
44 gpio_output(GPIO(DISP_PWM), 0);
46 /* Turn on bridge */
47 gpio_output(GPIO_MIPIBRDG_RST_L_1V8, 0);
48 gpio_output(GPIO_PP1200_MIPIBRDG_EN, 1);
49 gpio_output(GPIO_VDDIO_MIPIBRDG_EN, 1);
50 gpio_output(GPIO_PP1800_LCM_EN, 1);
51 mdelay(2);
52 gpio_output(GPIO_MIPIBRDG_PWRDN_L_1V8, 1);
53 mdelay(10);
54 gpio_output(GPIO_MIPIBRDG_RST_L_1V8, 1);
55 gpio_output(GPIO_PP3300_LCM_EN, 1);
58 struct panel_description *get_panel_description(int panel_id)
60 /* To read panel EDID, we have to first power on anx7625. */
61 power_on_anx7625();
63 mtk_i2c_bus_init(ANX7625_I2C_BUS);
65 if (anx7625_init(ANX7625_I2C_BUS)) {
66 printk(BIOS_ERR, "Can't init ANX7625 bridge.\n");
67 return NULL;
70 if (anx7625_dp_get_edid(ANX7625_I2C_BUS, &anx7625_data.edid)) {
71 printk(BIOS_ERR, "Can't get panel's edid.\n");
72 return NULL;
74 return &anx7625_panel;
77 void mtk_dsi_override_phy_timing(struct mtk_phy_timing *timing)
79 timing->da_hs_trail += 9;