soc/intel/ptl: Update ME specification version to 21
[coreboot.git] / src / mainboard / google / mistral / mainboard.c
blobe45ff8fef69d70cd16060fe30063b4b476aa63f9
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <device/device.h>
4 #include <device/mmio.h>
5 #include <vendorcode/google/chromeos/chromeos.h>
6 #include <soc/usb.h>
7 #include <soc/addressmap.h>
9 static struct usb_board_data usb1_board_data = {
10 .parameter_override_x0 = 0x63,
11 .parameter_override_x1 = 0x03,
12 .parameter_override_x0 = 0x1d,
13 .parameter_override_x1 = 0x03,
16 static void setup_usb(void)
18 /* Setting Secondary USB controller */
19 setup_usb_host(HSUSB_HS_PORT_1, &usb1_board_data);
22 static void configure_sdhci(void)
24 /* Program eMMC drive strength to 16/10/10 mA */
25 write32((void *)SDC1_TLMM_CFG_ADDR, 0x9FE4);
28 static void mainboard_init(struct device *dev)
30 /* Copy WIFI calibration data into CBMEM. */
31 if (CONFIG(CHROMEOS))
32 cbmem_add_vpd_calibration_data();
34 setup_usb();
35 configure_sdhci();
38 static void mainboard_enable(struct device *dev)
40 dev->ops->init = &mainboard_init;
43 struct chip_operations mainboard_ops = {
44 .enable_dev = mainboard_enable,