soc/intel/ptl: Update ME specification version to 21
[coreboot.git] / src / southbridge / intel / bd82x6x / fadt.c
blob98283cefb9023506e9af09f668ef31be4f3b6f75
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <device/pci_ops.h>
4 #include <acpi/acpi.h>
5 #include <southbridge/intel/common/pmutil.h>
6 #include "chip.h"
8 void acpi_fill_fadt(acpi_fadt_t *fadt)
10 struct device *dev = pcidev_on_root(0x1f, 0);
11 struct southbridge_intel_bd82x6x_config *chip = dev->chip_info;
12 u16 pmbase = pci_read_config16(dev, 0x40) & 0xfffe;
15 fadt->pm1a_evt_blk = pmbase;
16 fadt->pm1a_cnt_blk = pmbase + PM1_CNT;
17 fadt->pm2_cnt_blk = pmbase + PM2_CNT;
18 fadt->pm_tmr_blk = pmbase + PM1_TMR;
19 fadt->gpe0_blk = pmbase + GPE0_STS;
21 fadt->pm1_evt_len = 4;
22 fadt->pm1_cnt_len = 2;
23 fadt->pm2_cnt_len = 1;
24 fadt->pm_tmr_len = 4;
25 fadt->gpe0_blk_len = 16;
27 fill_fadt_extended_pm_io(fadt);
29 fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042;
31 fadt->flags |= ACPI_FADT_WBINVD |
32 ACPI_FADT_C1_SUPPORTED |
33 ACPI_FADT_SLEEP_BUTTON |
34 ACPI_FADT_SEALED_CASE |
35 ACPI_FADT_S4_RTC_WAKE |
36 ACPI_FADT_PLATFORM_CLOCK;
38 if (chip->docking_supported) {
39 fadt->flags |= ACPI_FADT_DOCKING_SUPPORTED;