1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #ifndef SUPERIO_FINTEK_F71808A_CHIP_H
4 #define SUPERIO_FINTEK_F71808A_CHIP_H
8 struct superio_fintek_f71808a_config
{
9 uint8_t hwm_vt1_boundary_1_temperature
;
10 uint8_t hwm_vt1_boundary_2_temperature
;
11 uint8_t hwm_vt1_boundary_3_temperature
;
12 uint8_t hwm_vt1_boundary_4_temperature
;
13 uint8_t hwm_fan1_boundary_hysteresis
;
14 uint8_t hwm_domain1_en
;
16 /* Multi function registers */
17 uint8_t multi_function_register_0
;
18 uint8_t multi_function_register_1
;
19 uint8_t multi_function_register_2
;
20 uint8_t multi_function_register_3
;
21 uint8_t multi_function_register_4
;
23 /* Intel Ibex Peak/PECI/AMD TSI */
24 uint8_t hwm_peci_tsi_ctrl
;
28 uint8_t hwm_fan1_seg1_speed
;
29 uint8_t hwm_fan1_seg2_speed
;
30 uint8_t hwm_fan1_seg3_speed
;
31 uint8_t hwm_fan1_seg4_speed
;
32 uint8_t hwm_fan1_seg5_speed
;
33 uint8_t hwm_fan1_temp_src
;
36 uint8_t hwm_fan2_seg1_speed
;
37 uint8_t hwm_fan2_seg2_speed
;
38 uint8_t hwm_fan2_seg3_speed
;
39 uint8_t hwm_fan2_seg4_speed
;
40 uint8_t hwm_fan2_seg5_speed
;
41 uint8_t hwm_fan2_temp_src
;
44 #endif /* SUPERIO_FINTEK_F71808A_CHIP_H */