soc/intel/ptl: Update ME specification version to 21
[coreboot.git] / src / superio / fintek / f71869ad / chip.h
blobf9fc063215b188a13ef4fba4cd377d7151d5fcad
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #ifndef SUPERIO_FINTEK_F71869AD_CHIP_H
4 #define SUPERIO_FINTEK_F71869AD_CHIP_H
6 #include <stdint.h>
8 struct superio_fintek_f71869ad_config {
9 /* Member variables are defined in devicetree.cb. */
10 uint8_t multi_function_register_1;
11 uint8_t multi_function_register_2;
12 uint8_t multi_function_register_3;
13 uint8_t multi_function_register_4;
14 uint8_t multi_function_register_5;
15 /* HWM configuration registers */
16 uint8_t hwm_smbus_address;
17 uint8_t hwm_smbus_control_reg;
18 uint8_t hwm_fan_type_sel_reg;
19 uint8_t hwm_fan1_temp_adj_rate_reg;
20 uint8_t hwm_fan_mode_sel_reg;
21 uint8_t hwm_fan1_idx_rpm_mode;
22 uint8_t hwm_fan1_seg1_speed_count;
23 uint8_t hwm_fan1_seg2_speed_count;
24 uint8_t hwm_fan1_seg3_speed_count;
25 uint8_t hwm_fan1_temp_map_sel;
26 uint8_t hwm_temp_sensor_type;
29 #endif /* SUPERIO_FINTEK_F71869AD_CHIP_H */