soc/intel/ptl: Update ME specification version to 21
[coreboot.git] / src / superio / fintek / f81803a / superio.c
blob0975bec6631190aa3f3fb132fbe2e38658f7c510
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #include <device/device.h>
4 #include <device/pnp.h>
5 #include <superio/conf_mode.h>
6 #include <pc80/keyboard.h>
7 #include "f81803a.h"
9 static void f81803a_pme_init(struct device *dev)
11 pnp_enter_conf_mode(dev);
12 pnp_write_config(dev, LDN_REG, F81803A_PME);
13 /* enable ERP function*/
14 /* also set PSIN to generate PSOUT*/
15 pnp_write_config(dev, PME_ERP_ENABLE_REG, ERP_ENABLE | ERP_PSOUT_EN);
16 pnp_exit_conf_mode(dev);
19 static void f81803a_init(struct device *dev)
21 if (!dev->enabled)
22 return;
23 switch (dev->path.pnp.device) {
24 /* TODO: Might potentially need code for GPIO or WDT. */
25 case F81803A_KBC:
26 pc_keyboard_init(NO_AUX_DEVICE);
27 break;
28 case F81803A_PME:
29 f81803a_pme_init(dev);
30 break;
34 static struct device_operations ops = {
35 .read_resources = pnp_read_resources,
36 .set_resources = pnp_set_resources,
37 .enable_resources = pnp_enable_resources,
38 .enable = pnp_alt_enable,
39 .init = f81803a_init,
40 .ops_pnp_mode = &pnp_conf_mode_8787_aa,
43 static struct pnp_info pnp_dev_info[] = {
44 { &ops, F81803A_SP1, PNP_IO0 | PNP_IRQ0, 0x7f8, },
45 { &ops, F81803A_SP2, PNP_IO0 | PNP_IRQ0, 0x7f8, },
46 { &ops, F81803A_HWM, PNP_IO0 | PNP_IRQ0, 0xff8, },
47 { &ops, F81803A_KBC, PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, 0x07f8, },
48 { &ops, F81803A_GPIO, PNP_IO0 | PNP_IRQ0, 0x7f8, },
49 { &ops, F81803A_WDT, PNP_IO0, 0x7f8 },
50 { &ops, F81803A_PME, },
53 static void enable_dev(struct device *dev)
55 pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
58 struct chip_operations superio_fintek_f81803a_ops = {
59 .name = "Fintek F81803A Super I/O",
60 .enable_dev = enable_dev