soc/intel/ptl: Update ME specification version to 21
[coreboot.git] / src / superio / nsc / pc87417 / early_init.c
blobc0bb2efa2711b615e471a18819061ac18cbee13a
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #include <arch/io.h>
4 #include <device/pnp_ops.h>
5 #include <device/pnp.h>
6 #include <stdint.h>
7 #include "pc87417.h"
9 void pc87417_disable_dev(pnp_devfn_t dev)
11 pnp_set_logical_device(dev);
12 pnp_set_enable(dev, 0);
15 void pc87417_enable_dev(pnp_devfn_t dev)
17 pnp_set_logical_device(dev);
18 pnp_set_enable(dev, 1);
21 void xbus_cfg(pnp_devfn_t dev)
23 u8 i;
24 u16 xbus_index;
26 pnp_set_logical_device(dev);
27 /* Select proper BIOS size (4MB). */
28 pnp_write_config(dev, PC87417_XMEMCNF2,
29 (pnp_read_config(dev, PC87417_XMEMCNF2)) | 0x04);
30 xbus_index = pnp_read_iobase(dev, PNP_IDX_IO0);
32 /* Enable writes to devices attached to XCS0 (XBUS Chip Select 0). */
33 for (i = 0; i <= 0xf; i++)
34 outb((i << 4), xbus_index + PC87417_HAP0);