1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <device/pci_ehci.h>
5 static unsigned pci_find_next_capability(pci_devfn_t dev
, unsigned cap
, unsigned last
)
11 status
= pci_read_config16(dev
, PCI_STATUS
);
12 if (!(status
& PCI_STATUS_CAP_LIST
))
15 u8 hdr_type
= pci_read_config8(dev
, PCI_HEADER_TYPE
);
16 switch (hdr_type
& 0x7f) {
17 case PCI_HEADER_TYPE_NORMAL
:
18 case PCI_HEADER_TYPE_BRIDGE
:
19 pos
= PCI_CAPABILITY_LIST
;
21 case PCI_HEADER_TYPE_CARDBUS
:
22 pos
= PCI_CB_CAPABILITY_LIST
;
28 pos
= pci_read_config8(dev
, pos
);
29 while (reps
-- && (pos
>= 0x40)) { /* Loop through the linked list. */
33 this_cap
= pci_read_config8(dev
, pos
+ PCI_CAP_LIST_ID
);
37 if (!last
&& (this_cap
== cap
))
43 pos
= pci_read_config8(dev
, pos
+ PCI_CAP_LIST_NEXT
);
48 static unsigned pci_find_capability(pci_devfn_t dev
, unsigned cap
)
50 return pci_find_next_capability(dev
, cap
, 0);
53 extern void *ehci_bar
;
54 int ehci_debug_hw_enable(unsigned int *base
, unsigned int *dbg_offset
)
56 pci_devfn_t dbg_dev
= pci_ehci_dbg_dev(CONFIG_USBDEBUG_HCD_INDEX
);
57 pci_ehci_dbg_enable(dbg_dev
, CONFIG_EHCI_BAR
);
58 pci_devfn_t dev
= dbg_dev
;
60 u8 pos
= pci_find_capability(dev
, PCI_CAP_ID_EHCI_DEBUG
);
64 u32 cap
= pci_read_config32(dev
, pos
);
66 /* FIXME: We should remove static EHCI_BAR_INDEX. */
67 u8 dbg_bar
= 0x10 + 4 * ((cap
>> 29) - 1);
68 if (dbg_bar
!= EHCI_BAR_INDEX
)
71 *base
= (u32
)ehci_bar
;
72 *dbg_offset
= (cap
>>16) & 0x1ffc;
76 void ehci_debug_select_port(unsigned int port
)
78 pci_devfn_t dbg_dev
= pci_ehci_dbg_dev(CONFIG_USBDEBUG_HCD_INDEX
);
79 pci_ehci_dbg_set_port(dbg_dev
, port
);