src/arch/x86/Makefile.mk

   1 ## SPDX-License-Identifier: GPL-2.0-only
   2
   3 ifeq ($(CONFIG_POSTCAR_STAGE),y)
   4 $(eval $(call init_standard_toolchain,postcar))
   5 endif
   6
   7 ################################################################################
   8 # i386 specific tools
   9 NVRAMTOOL:=$(objutil)/nvramtool/nvramtool
  10
  11 OPTION_TABLE_H:=
  12 ifeq ($(CONFIG_HAVE_OPTION_TABLE),y)
  13
  14 CMOS_LAYOUT_FILE := $(top)/$(call strip_quotes,$(CONFIG_CMOS_LAYOUT_FILE))
  15
  16 cbfs-files-y += cmos_layout.bin
  17 cmos_layout.bin-file = $(obj)/cmos_layout.bin
  18 cmos_layout.bin-type = cmos_layout
  19
  20 $(obj)/cmos_layout.bin: $(NVRAMTOOL) $(CMOS_LAYOUT_FILE)
  21         @printf "    OPTION     $(subst $(obj)/,,$(@))\n"
  22         $(NVRAMTOOL) -y $(CMOS_LAYOUT_FILE) -L $@
  23
  24 OPTION_TABLE_H:=$(obj)/option_table.h
  25
  26 $(OPTION_TABLE_H): $(NVRAMTOOL) $(CMOS_LAYOUT_FILE)
  27         @printf "    OPTION     $(subst $(obj)/,,$(@))\n"
  28         $(NVRAMTOOL) -y $(CMOS_LAYOUT_FILE) -H $@
  29 endif # CONFIG_HAVE_OPTION_TABLE
  30
  31 stripped_vgabios_id = $(call strip_quotes,$(CONFIG_VGA_BIOS_ID))
  32 cbfs-files-$(CONFIG_VGA_BIOS) += pci$(stripped_vgabios_id).rom
  33 pci$(stripped_vgabios_id).rom-file := $(call strip_quotes,$(CONFIG_VGA_BIOS_FILE))
  34 pci$(stripped_vgabios_id).rom-type := optionrom
  35
  36 stripped_second_vbios_id = $(call strip_quotes,$(CONFIG_VGA_BIOS_SECOND_ID))
  37 cbfs-files-$(CONFIG_VGA_BIOS_SECOND) += pci$(stripped_second_vbios_id).rom
  38 pci$(stripped_second_vbios_id).rom-file := $(call strip_quotes,$(CONFIG_VGA_BIOS_SECOND_FILE))
  39 pci$(stripped_second_vbios_id).rom-type := optionrom
  40
  41 stripped_vgabios_dgpu_id = $(call strip_quotes,$(CONFIG_VGA_BIOS_DGPU_ID))
  42 cbfs-files-$(CONFIG_VGA_BIOS_DGPU) += pci$(stripped_vgabios_dgpu_id).rom
  43 pci$(stripped_vgabios_dgpu_id).rom-file := $(call strip_quotes,$(CONFIG_VGA_BIOS_DGPU_FILE))
  44 pci$(stripped_vgabios_dgpu_id).rom-type := optionrom
  45
  46 # The AMD LPC SPI DMA controller requires source files to be 64 byte aligned.
  47 ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA),y)
  48 pci$(stripped_vgabios_id).rom-align := 64
  49 pci$(stripped_second_vbios_id).rom-align := 64
  50 pci$(stripped_vgabios_dgpu_id).rom-align := 64
  51 endif # CONFIG_SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA
  52
  53 ###############################################################################
  54 # bootblock
  55 ###############################################################################
  56
  57 ifeq ($(CONFIG_ARCH_BOOTBLOCK_X86_32)$(CONFIG_ARCH_BOOTBLOCK_X86_64),y)
  58
  59 bootblock-y += boot.c
  60 bootblock-$(CONFIG_DEBUG_HW_BREAKPOINTS_IN_ALL_STAGES) += breakpoint.c
  61 bootblock-y += post.c
  62 bootblock-y += cpu_common.c
  63 bootblock-$(CONFIG_IDT_IN_EVERY_STAGE) += exception.c
  64 bootblock-$(CONFIG_IDT_IN_EVERY_STAGE) += idt.S
  65 bootblock-y += memcpy.c
  66 bootblock-y += memset.c
  67 bootblock-$(CONFIG_ARCH_BOOTBLOCK_X86_32) += memmove_32.c
  68 bootblock-$(CONFIG_ARCH_BOOTBLOCK_X86_64) += memmove_64.S
  69 bootblock-$(CONFIG_COLLECT_TIMESTAMPS_TSC) += timestamp.c
  70 bootblock-$(CONFIG_X86_TOP4G_BOOTMEDIA_MAP) += mmap_boot.c
  71 bootblock-$(CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS_IN_ALL_STAGES) += null_breakpoint.c
  72 bootblock-$(CONFIG_BOOTBLOCK_NORMAL) += bootblock_normal.c
  73 bootblock-y += gdt_init.S
  74 bootblock-y += id.S
  75 bootblock-$(CONFIG_HAVE_CF9_RESET) += cf9_reset.c
  76 bootblock-y += bootblock.ld
  77 bootblock-y += car.ld
  78
  79 $(call src-to-obj,bootblock,$(dir)/id.S): $(obj)/build.h
  80
  81 $(eval $(call link_stage,bootblock))
  82
  83 ifeq ($(CONFIG_BOOTBLOCK_IN_CBFS),y)
  84 add_bootblock = \
  85         $(CBFSTOOL) $(1) add -f $(2) -n bootblock -t bootblock $(TXTIBB) \
  86         -b -$(call file-size,$(2)) \
  87         $(cbfs-autogen-attributes) $(TS_OPTIONS) $(CBFSTOOL_ADD_CMD_OPTIONS)
  88 endif
  89
  90 ifneq ($(CONFIG_CBFS_VERIFICATION),y)
  91 $(call src-to-obj,bootblock,$(dir)/walkcbfs.S): $(obj)/fmap_config.h
  92 bootblock-y += walkcbfs.S
  93 endif
  94
  95 endif # CONFIG_ARCH_BOOTBLOCK_X86_32 / CONFIG_ARCH_BOOTBLOCK_X86_64
  96
  97 ###############################################################################
  98 # verstage
  99 ###############################################################################
 100
 101 ifeq ($(CONFIG_ARCH_VERSTAGE_X86_32)$(CONFIG_ARCH_VERSTAGE_X86_64),y)
 102
 103 verstage-$(CONFIG_VBOOT_SEPARATE_VERSTAGE) += assembly_entry.S
 104 verstage-y += boot.c
 105 verstage-$(CONFIG_DEBUG_HW_BREAKPOINTS_IN_ALL_STAGES) += breakpoint.c
 106 verstage-y += post.c
 107 verstage-$(CONFIG_VBOOT_SEPARATE_VERSTAGE) += gdt_init.S
 108 verstage-$(CONFIG_IDT_IN_EVERY_STAGE) += exception.c
 109 verstage-$(CONFIG_IDT_IN_EVERY_STAGE) += idt.S
 110 verstage-$(CONFIG_HAVE_CF9_RESET) += cf9_reset.c
 111
 112 verstage-y += cpu_common.c
 113 verstage-y += memset.c
 114 verstage-y += memcpy.c
 115 verstage-$(CONFIG_ARCH_VERSTAGE_X86_32) += memmove_32.c
 116 verstage-$(CONFIG_ARCH_VERSTAGE_X86_64) += memmove_64.S
 117 verstage-$(CONFIG_X86_TOP4G_BOOTMEDIA_MAP) += mmap_boot.c
 118 verstage-$(CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS_IN_ALL_STAGES) += null_breakpoint.c
 119 # If verstage is a separate stage it means there's no need
 120 # for a chipset-specific car_stage_entry() so use the generic one
 121 # which just calls verstage().
 122 verstage-$(CONFIG_VBOOT_SEPARATE_VERSTAGE) += verstage.c
 123
 124 verstage-$(CONFIG_COLLECT_TIMESTAMPS_TSC) += timestamp.c
 125
 126 verstage-y += car.ld
 127
 128 verstage-libs ?=
 129
 130 $(eval $(call link_stage,verstage))
 131
 132 endif # CONFIG_ARCH_VERSTAGE_X86_32 / CONFIG_ARCH_VERSTAGE_X86_64
 133
 134 ###############################################################################
 135 # romstage
 136 ###############################################################################
 137
 138 ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32)$(CONFIG_ARCH_ROMSTAGE_X86_64),y)
 139
 140 romstage-$(CONFIG_SEPARATE_ROMSTAGE) += assembly_entry.S
 141 romstage-$(CONFIG_SEPARATE_ROMSTAGE) += romstage.c
 142 romstage-y += boot.c
 143 romstage-$(CONFIG_DEBUG_HW_BREAKPOINTS_IN_ALL_STAGES) += breakpoint.c
 144 romstage-y += post.c
 145 romstage-$(CONFIG_SEPARATE_ROMSTAGE) += gdt_init.S
 146 romstage-y += cpu_common.c
 147 romstage-$(CONFIG_IDT_IN_EVERY_STAGE) += exception.c
 148 romstage-$(CONFIG_IDT_IN_EVERY_STAGE) += idt.S
 149 romstage-y += memcpy.c
 150 romstage-$(CONFIG_ARCH_ROMSTAGE_X86_32) += memmove_32.c
 151 romstage-$(CONFIG_ARCH_ROMSTAGE_X86_64) += memmove_64.S
 152 romstage-y += memset.c
 153 romstage-$(CONFIG_X86_TOP4G_BOOTMEDIA_MAP) += mmap_boot.c
 154 romstage-$(CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS_IN_ALL_STAGES) += null_breakpoint.c
 155 romstage-y += postcar_loader.c
 156 romstage-$(CONFIG_COLLECT_TIMESTAMPS_TSC) += timestamp.c
 157 romstage-$(CONFIG_HAVE_CF9_RESET) += cf9_reset.c
 158 romstage-$(CONFIG_COOP_MULTITASKING) += thread.c
 159 romstage-$(CONFIG_COOP_MULTITASKING) += thread_switch.S
 160 romstage-y += car.ld
 161
 162 romstage-srcs += $(wildcard $(src)/mainboard/$(MAINBOARDDIR)/romstage.c)
 163 romstage-libs ?=
 164
 165 $(eval $(call link_stage,romstage))
 166
 167 # Compiling crt0 with -g seems to trigger https://sourceware.org/bugzilla/show_bug.cgi?id=6428
 168 romstage-S-ccopts += -g0
 169
 170 endif # CONFIG_ARCH_ROMSTAGE_X86_32 / CONFIG_ARCH_ROMSTAGE_X86_64
 171
 172 ###############################################################################
 173 # postcar
 174 ###############################################################################
 175
 176 ifeq ($(CONFIG_ARCH_POSTCAR_X86_32),y)
 177 $(eval $(call create_class_compiler,postcar,x86_32))
 178 else
 179 $(eval $(call create_class_compiler,postcar,x86_64))
 180 endif
 181 postcar-generic-ccopts += -D__POSTCAR__
 182
 183 postcar-y += boot.c
 184 postcar-$(CONFIG_DEBUG_HW_BREAKPOINTS_IN_ALL_STAGES) += breakpoint.c
 185 postcar-y += post.c
 186 postcar-y += gdt_init.S
 187 postcar-y += cpu_common.c
 188 postcar-$(CONFIG_IDT_IN_EVERY_STAGE) += exception.c
 189 postcar-$(CONFIG_IDT_IN_EVERY_STAGE) += idt.S
 190 postcar-y += exit_car.S
 191 postcar-y += memcpy.c
 192 postcar-$(CONFIG_ARCH_POSTCAR_X86_32) += memmove_32.c
 193 postcar-$(CONFIG_ARCH_POSTCAR_X86_64) += memmove_64.S
 194 postcar-y += memset.c
 195 postcar-$(CONFIG_X86_TOP4G_BOOTMEDIA_MAP) += mmap_boot.c
 196 postcar-$(CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS_IN_ALL_STAGES) += null_breakpoint.c
 197 postcar-y += postcar.c
 198 postcar-$(CONFIG_COLLECT_TIMESTAMPS_TSC) += timestamp.c
 199 postcar-$(CONFIG_HAVE_CF9_RESET) += cf9_reset.c
 200
 201 LDFLAGS_postcar += -Map $(objcbfs)/postcar.map
 202
 203 $(eval $(call link_stage,postcar))
 204
 205 $(objcbfs)/postcar.elf: $(objcbfs)/postcar.debug.rmod
 206         cp $< $@
 207
 208 # Add postcar to CBFS
 209 cbfs-files-$(CONFIG_POSTCAR_STAGE)  += $(CONFIG_CBFS_PREFIX)/postcar
 210 $(CONFIG_CBFS_PREFIX)/postcar-file := $(objcbfs)/postcar.elf
 211 $(CONFIG_CBFS_PREFIX)/postcar-type := stage
 212 $(CONFIG_CBFS_PREFIX)/postcar-compression := none
 213
 214 ###############################################################################
 215 # ramstage
 216 ###############################################################################
 217
 218 ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32)$(CONFIG_ARCH_RAMSTAGE_X86_64),y)
 219
 220 ramstage-y += acpi.c
 221 ramstage-$(CONFIG_HAVE_ACPI_RESUME) += acpi_s3.c
 222 ramstage-$(CONFIG_ACPI_BERT) += acpi_bert_storage.c
 223 ramstage-y += boot.c
 224 ramstage-y += post.c
 225 ramstage-y += c_start.S
 226 ramstage-y += cpu.c
 227 ramstage-y += cpu_common.c
 228 ramstage-$(CONFIG_DEBUG_HW_BREAKPOINTS) += breakpoint.c
 229 ramstage-y += ebda.c
 230 ramstage-y += exception.c
 231 ramstage-y += idt.S
 232 ramstage-$(CONFIG_IOAPIC) += ioapic.c
 233 ramstage-y += dma.c
 234 ramstage-y += memcpy.c
 235 ramstage-$(CONFIG_ARCH_RAMSTAGE_X86_32) += memmove_32.c
 236 ramstage-$(CONFIG_ARCH_RAMSTAGE_X86_64) += memmove_64.S
 237 ramstage-y += memset.c
 238 ramstage-$(CONFIG_X86_TOP4G_BOOTMEDIA_MAP) += mmap_boot.c
 239 ramstage-$(CONFIG_GENERATE_MP_TABLE) += mpspec.c
 240 ramstage-$(CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS) += null_breakpoint.c
 241 ramstage-$(CONFIG_GENERATE_PIRQ_TABLE) += pirq_routing.c
 242 ramstage-y += rdrand.c
 243 ramstage-$(CONFIG_GENERATE_SMBIOS_TABLES) += smbios.c
 244 ramstage-y += tables.c
 245 ramstage-$(CONFIG_COOP_MULTITASKING) += thread.c
 246 ramstage-$(CONFIG_COOP_MULTITASKING) += thread_switch.S
 247 ramstage-$(CONFIG_COLLECT_TIMESTAMPS_TSC) += timestamp.c
 248 ramstage-$(CONFIG_HAVE_ACPI_RESUME) += wakeup.S
 249 ramstage-$(CONFIG_HAVE_CF9_RESET) += cf9_reset.c
 250
 251 rmodules_x86_32-y += memcpy.c
 252 rmodules_x86_32-y += memmove_32.c
 253 rmodules_x86_32-y += memset.c
 254
 255 rmodules_x86_64-y += memcpy.c
 256 rmodules_x86_64-y += memmove_64.S
 257 rmodules_x86_64-y += memset.c
 258
 259 ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32),y)
 260 target-objcopy=-O elf32-i386 -B i386
 261 endif
 262 ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_64),y)
 263 target-objcopy=-O elf64-x86-64 -B i386:x86-64
 264 endif
 265
 266 # Make sure generated code does not use XMMx and MMx registers
 267 CFLAGS_x86_32 += -mno-mmx -mno-sse
 268 CFLAGS_x86_64 += -mno-mmx -mno-sse
 269
 270 ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c)
 271 ifeq ($(CONFIG_GENERATE_MP_TABLE),y)
 272 ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/mptable.c),)
 273 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/mptable.c
 274 endif
 275 endif
 276 ifeq ($(CONFIG_GENERATE_PIRQ_TABLE),y)
 277 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/irq_tables.c
 278 endif
 279
 280 ramstage-libs ?=
 281
 282 $(eval $(call link_stage,ramstage))
 283
 284 $(objcbfs)/ramstage.elf: $(objcbfs)/ramstage.debug.rmod
 285         cp $< $@
 286
 287 endif # CONFIG_ARCH_RAMSTAGE_X86_32 / CONFIG_ARCH_RAMSTAGE_X86_64
 288
 289 smm-$(CONFIG_DEBUG_HW_BREAKPOINTS_IN_ALL_STAGES) += breakpoint.c
 290 smm-$(CONFIG_IDT_IN_EVERY_STAGE) += exception.c
 291 smm-$(CONFIG_IDT_IN_EVERY_STAGE) += idt.S
 292 smm-y += memcpy.c
 293 smm-$(CONFIG_ARCH_RAMSTAGE_X86_32) += memmove_32.c
 294 smm-$(CONFIG_ARCH_RAMSTAGE_X86_64) += memmove_64.S
 295 smm-y += memset.c
 296 smm-$(CONFIG_X86_TOP4G_BOOTMEDIA_MAP) += mmap_boot.c
 297 smm-$(CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS_IN_ALL_STAGES) += null_breakpoint.c
 298
 299 smm-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/smihandler.c)
 300
 301 ifneq ($(CONFIG_HAVE_CONFIGURABLE_APMC_SMI_PORT),y)
 302 ramstage-y += apmc_smi_port.c
 303 smm-y += apmc_smi_port.c
 304 endif