mb/starlabs/starbook/cml: Drop superfluous devices from devicetree
[coreboot.git] / src / mainboard / starlabs / starbook / variants / cml / devicetree.cb
blob448fc298470dbed2ce679475cd7cc0f6f1d1d801
1 chip soc/intel/cannonlake
2 # CPU
3 # Enable Enhanced Intel SpeedStep
4 register "eist_enable" = "1"
6 # Graphics
7 # IGD Displays
8 register "panel_cfg" = "{
9 .up_delay_ms = 0, // T3
10 .backlight_on_delay_ms = 0, // T7
11 .backlight_off_delay_ms = 0, // T9
12 .down_delay_ms = 0, // T10
13 .cycle_delay_ms = 500, // T12
14 .backlight_pwm_hz = 200, // PWM
17 # FSP Memory
18 register "enable_c6dram" = "1"
19 register "SaGv" = "SaGv_Enabled"
21 # FSP Silicon
22 # Serial I/O
23 register "SerialIoDevMode" = "{
24 [PchSerialIoIndexI2C0] = PchSerialIoPci,
25 [PchSerialIoIndexI2C4] = PchSerialIoSkipInit,
26 [PchSerialIoIndexUART2] = PchSerialIoSkipInit,
29 # Power
30 register "PchPmSlpS3MinAssert" = "2" # 50ms
31 register "PchPmSlpS4MinAssert" = "3" # 1s
32 register "PchPmSlpSusMinAssert" = "3" # 500ms
33 register "PchPmSlpAMinAssert" = "3" # 2s
35 # PM Util
36 # GPE configuration
37 # Note that GPE events called out in ASL code rely on this
38 # route. i.e. If this route changes then the affected GPE
39 # offset bits also need to be changed.
40 # sudo devmem2 0xfe001920 (pmc_bar + GPIO_GPE_CFG)
41 register "gpe0_dw0" = "PMC_GPP_B"
42 register "gpe0_dw1" = "PMC_GPP_C"
43 register "gpe0_dw2" = "PMC_GPP_E"
45 # PCIe Clock
46 register "PcieClkSrcClkReq[0]" = "PCIE_CLK_NOTUSED"
47 register "PcieClkSrcClkReq[2]" = "PCIE_CLK_NOTUSED"
48 register "PcieClkSrcClkReq[3]" = "PCIE_CLK_NOTUSED"
49 register "PcieClkSrcClkReq[4]" = "PCIE_CLK_NOTUSED"
50 register "PcieClkSrcClkReq[5]" = "PCIE_CLK_NOTUSED"
52 # Actual device tree.
53 device domain 0 on
54 device ref igpu on end
55 device ref dptf on
56 register "Device4Enable" = "1"
57 end
58 device ref xhci on
59 # Motherboard USB Type C
60 register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)"
61 register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)"
63 # Motherboard USB 3.0
64 register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)"
65 register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)"
67 # Daughterboard SD Card
68 register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)"
70 # Daughterboard USB 3.0
71 register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)"
72 register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)"
74 # Webcam
75 register "usb2_ports[CONFIG_CCD_PORT]" = "USB2_PORT_MID(OC_SKIP)"
77 # Internal Bluetooth
78 register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)"
79 end
80 device ref shared_sram on end
81 device ref cnvi_wifi on
82 chip drivers/wifi/generic
83 register "wake" = "GPE0_PME_B0"
84 device generic 0 on end
85 end
86 end
87 device ref i2c0 on
88 chip drivers/i2c/hid
89 register "generic.hid" = ""STAR0001""
90 register "generic.desc" = ""Touchpad""
91 register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_B3_IRQ)"
92 register "generic.detect" = "1"
93 register "hid_desc_reg_offset" = "0x20"
94 device i2c 2c on end
95 end
96 end
97 device ref sata on
98 register "SataSalpSupport" = "1"
99 # Port 1
100 register "SataPortsEnable[1]" = "1"
101 register "SataPortsDevSlp[1]" = "1"
103 device ref i2c4 on end
104 device ref uart2 on end
105 device ref pcie_rp9 on # SSD x4
106 register "PcieRpSlotImplemented[8]" = "1"
107 register "PcieRpEnable[8]" = "1"
108 register "PcieRpLtrEnable[8]" = "1"
109 register "PcieClkSrcUsage[1]" = "0x08"
110 register "PcieClkSrcClkReq[1]" = "1"
111 smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280" "SlotDataBusWidth4X"
113 device ref lpc_espi on
114 register "gen1_dec" = "0x000c0681"
115 register "gen2_dec" = "0x000c1641"
116 register "gen3_dec" = "0x00fc0201"
117 register "gen4_dec" = "0x000c0081"
119 chip ec/starlabs/merlin
120 # Port pair 4Eh/4Fh
121 device pnp 4e.00 on end # IO Interface
122 device pnp 4e.01 off end # Com 1
123 device pnp 4e.02 off end # Com 2
124 device pnp 4e.04 off end # System Wake-Up
125 device pnp 4e.05 off end # PS/2 Mouse
126 device pnp 4e.06 on # PS/2 Keyboard
127 io 0x60 = 0x0060
128 io 0x62 = 0x0064
129 irq 0x70 = 1
131 device pnp 4e.0a off end # Consumer IR
132 device pnp 4e.0f off end # Shared Memory/Flash Interface
133 device pnp 4e.10 off end # RTC-like Timer
134 device pnp 4e.11 off end # Power Management Channel 1
135 device pnp 4e.12 off end # Power Management Channel 2
136 device pnp 4e.13 off end # Serial Peripheral Interface
137 device pnp 4e.14 off end # Platform EC Interface
138 device pnp 4e.17 off end # Power Management Channel 3
139 device pnp 4e.18 off end # Power Management Channel 4
140 device pnp 4e.19 off end # Power Management Channel 5
143 device ref hda on
144 register "PchHdaAudioLinkHda" = "1"
146 device ref smbus on end
148 chip drivers/crb
149 device mmio 0xfed40000 on end