src/cpu/intel/common/common.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #ifndef _CPU_INTEL_COMMON_H
   4 #define _CPU_INTEL_COMMON_H
   5
   6 #include <types.h>
   7 #include <acpi/acpigen.h>
   8
   9 void set_vmx_and_lock(void);
  10 void set_feature_ctrl_vmx(void);
  11 void set_feature_ctrl_vmx_arg(bool enable);
  12 void set_feature_ctrl_lock(void);
  13
  14 /*
  15  * Init CPPC block with MSRs for Intel Enhanced Speed Step Technology.
  16  * Version 2 is suggested--this function's implementation of version 3
  17  * may have room for improvement.
  18  */
  19 struct cppc_config;
  20 void cpu_init_cppc_config(struct cppc_config *config, u32 version);
  21
  22 /*
  23  * Returns true if CPU supports Hyper-Threading.
  24  */
  25 bool intel_ht_supported(void);
  26
  27 /*
  28  * Returns true if it's not thread 0 on a hyperthreading enabled core.
  29  */
  30 bool intel_ht_sibling(void);
  31
  32 /*
  33  * Lock AES-NI feature (MSR_FEATURE_CONFIG) to prevent unintended changes
  34  * to the enablement state as suggested in Intel document 325384-070US.
  35  */
  36 void set_aesni_lock(void);
  37
  38 /* Enable local CPU APIC TPR (Task Priority Register) updates */
  39 void enable_lapic_tpr(void);
  40
  41 /* Enable DCA (Direct Cache Access) */
  42 void configure_dca_cap(void);
  43
  44 /*
  45  * Set EPB (Energy Performance Bias)
  46  * Possible values are 0 (performance) to 15 (powersave).
  47  */
  48 void set_energy_perf_bias(u8 policy);
  49
  50 /*
  51  * Check energy performance preference and HWP capabilities from Thermal and
  52  * Power Management Leaf CPUID.
  53  */
  54 bool check_energy_perf_cap(void);
  55
  56 /*
  57  * Set the IA32_HWP_REQUEST Energy-Performance Preference bits on the logical
  58  * thread. 0 is a hint to the HWP to prefer performance, and 255 is a hint to
  59  * prefer energy efficiency.
  60  */
  61 void set_energy_perf_pref(u8 pref);
  62
  63 /*
  64  * Instructs the CPU to use EPP hints. This means that any energy policies set
  65  * up in `set_energy_perf_bias` will be ignored afterwards.
  66  */
  67 void enable_energy_perf_pref(void);
  68
  69 /*
  70  * Check if Total Memory Encryption (TME) is supported by the CPU
  71  *
  72  * coreboot shall detect the existence of TME feature by running CPUID instruction:
  73  * CPUID leaf 7/sub-leaf 0: Return Value in ECX [bit 13] = 1
  74  */
  75 bool is_tme_supported(void);
  76
  77 #endif