soc/mediatek: Fix register access for EINT
[coreboot.git] / src / cpu / intel / model_f3x / model_f3x_init.c
blob5264c60da6fb2b33add6aa54d9374c653627f510
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <cpu/cpu.h>
4 #include <cpu/intel/common/common.h>
5 #include <cpu/intel/microcode.h>
6 #include <cpu/x86/cache.h>
7 #include <cpu/x86/mtrr.h>
8 #include <device/device.h>
10 static void model_f3x_init(struct device *cpu)
12 /* Turn on caching if we haven't already */
13 enable_cache();
16 static struct device_operations cpu_dev_ops = {
17 .init = model_f3x_init,
20 static const struct cpu_device_id cpu_table[] = {
21 { X86_VENDOR_INTEL, 0x0f34, CPUID_EXACT_MATCH_MASK }, /* Xeon */
22 CPU_TABLE_END
25 static const struct cpu_driver model_f3x __cpu_driver = {
26 .ops = &cpu_dev_ops,
27 .id_table = cpu_table,