src/device/dram/lpddr4.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <console/console.h>
   4 #include <device/device.h>
   5 #include <device/dram/lpddr4.h>
   6 #include <memory_info.h>
   7 #include <types.h>
   8
   9 enum lpddr4_speed_grade {
  10         LPDDR4_1333,
  11         LPDDR4_1600,
  12         LPDDR4_1866,
  13         LPDDR4_2133,
  14         LPDDR4_2400,
  15         LPDDR4_2666,
  16         LPDDR4_3200,
  17         LPDDR4_3733,
  18         LPDDR4_4266,
  19 };
  20
  21 struct lpddr4_speed_attr {
  22         uint32_t min_clock_mhz; // inclusive
  23         uint32_t max_clock_mhz; // inclusive
  24         uint32_t reported_mts;
  25 };
  26
  27 /**
  28  * LPDDR4 speed attributes derived from JEDEC 209-4C and industry norms
  29  *
  30  * min_clock_mhz = Previous max_clock_mhz + 1
  31  * max_clock_mhz = 1000/min_tCk_avg(ns)
  32  * reported_mts  = Standard reported DDR4 speed in MT/s
  33  *                 May be slightly less than the actual max MT/s
  34  */
  35 static const struct lpddr4_speed_attr lpddr4_speeds[] = {
  36         [LPDDR4_1333] = {
  37                 .min_clock_mhz = 10,
  38                 .max_clock_mhz = 667,
  39                 .reported_mts = 1333,
  40         },
  41         [LPDDR4_1600] = {
  42                 .min_clock_mhz = 668,
  43                 .max_clock_mhz = 800,
  44                 .reported_mts = 1600
  45         },
  46         [LPDDR4_1866] = {
  47                 .min_clock_mhz = 801,
  48                 .max_clock_mhz = 934,
  49                 .reported_mts = 1866,
  50         },
  51         [LPDDR4_2133] = {
  52                 .min_clock_mhz = 935,
  53                 .max_clock_mhz = 1067,
  54                 .reported_mts = 2133
  55         },
  56         [LPDDR4_2400] = {
  57                 .min_clock_mhz = 1068,
  58                 .max_clock_mhz = 1200,
  59                 .reported_mts = 2400
  60         },
  61         [LPDDR4_2666] = {
  62                 .min_clock_mhz = 1201,
  63                 .max_clock_mhz = 1333,
  64                 .reported_mts = 2666
  65         },
  66         [LPDDR4_3200] = {
  67                 .min_clock_mhz = 1334,
  68                 .max_clock_mhz = 1600,
  69                 .reported_mts = 3200
  70         },
  71         [LPDDR4_3733] = {
  72                 .min_clock_mhz = 1601,
  73                 .max_clock_mhz = 1867,
  74                 .reported_mts = 3733
  75         },
  76         [LPDDR4_4266] = {
  77                 .min_clock_mhz = 1868,
  78                 .max_clock_mhz = 2134,
  79                 .reported_mts = 4266
  80         },
  81 };
  82
  83 /**
  84  * Converts LPDDR4 clock speed in MHz to the standard reported speed in MT/s
  85  */
  86 uint16_t lpddr4_speed_mhz_to_reported_mts(uint16_t speed_mhz)
  87 {
  88         for (enum lpddr4_speed_grade speed = 0; speed < ARRAY_SIZE(lpddr4_speeds); speed++) {
  89                 const struct lpddr4_speed_attr *speed_attr = &lpddr4_speeds[speed];
  90                 if (speed_mhz >= speed_attr->min_clock_mhz &&
  91                     speed_mhz <= speed_attr->max_clock_mhz) {
  92                         return speed_attr->reported_mts;
  93                 }
  94         }
  95         printk(BIOS_ERR, "LPDDR4 speed of %d MHz is out of range\n", speed_mhz);
  96         return 0;
  97 }