src/drivers/intel/fsp2_0/include/fsp/api.h

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2
   3 #ifndef _FSP2_0_API_H_
   4 #define _FSP2_0_API_H_
   5
   6 #include <stddef.h>
   7 #include <stdint.h>
   8 #include <fsp/soc_binding.h>
   9 #include <soc/intel/common/mma.h>
  10
  11 #define FSP_SUCCESS     EFI_SUCCESS
  12 #define FSP_INVALID_PARAMETER   EFI_INVALID_PARAMETER
  13 #define FSP_DEVICE_ERROR        EFI_DEVICE_ERROR
  14 #define FSP_NOT_FOUND   EFI_NOT_FOUND
  15 #define FSP_NOT_STARTED EFI_NOT_STARTED
  16 #define FSP_UNSUPPORTED EFI_UNSUPPORTED
  17
  18 enum fsp_boot_mode {
  19         FSP_BOOT_WITH_FULL_CONFIGURATION = 0x00,
  20         FSP_BOOT_WITH_MINIMAL_CONFIGURATION = 0x01,
  21         FSP_BOOT_ASSUMING_NO_CONFIGURATION_CHANGES = 0x02,
  22         FSP_BOOT_ON_S4_RESUME = 0x05,
  23         FSP_BOOT_ON_S3_RESUME = 0x11,
  24         FSP_BOOT_ON_FLASH_UPDATE = 0x12,
  25         FSP_BOOT_IN_RECOVERY_MODE = 0x20
  26 };
  27
  28 enum fsp_notify_phase {
  29         AFTER_PCI_ENUM = 0x20,
  30         READY_TO_BOOT = 0x40,
  31         END_OF_FIRMWARE = 0xF0
  32 };
  33
  34 /* Main FSP stages */
  35 void preload_fspm(void);
  36 void fsp_memory_init(bool s3wake);
  37 void preload_fsps(void);
  38 void fsp_silicon_init(void);
  39
  40 /*
  41  * Load FSP-S from stage cache or CBFS. This allows SoCs to load FSPS-S
  42  * separately from calling silicon init. It might be required in cases where
  43  * stage cache is no longer available by the point SoC calls into silicon init.
  44  */
  45 void fsps_load(void);
  46
  47 /* Callbacks for updating stage-specific parameters */
  48 void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version);
  49 void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd);
  50 /* Callbacks for SoC/Mainboard specific overrides */
  51 void platform_fsp_memory_multi_phase_init_cb(uint32_t phase_index);
  52 void platform_fsp_silicon_multi_phase_init_cb(uint32_t phase_index);
  53 /* Check if MultiPhase Si Init is enabled */
  54 bool fsp_is_multi_phase_init_enabled(void);
  55 /*
  56  * The following functions are used when FSP_PLATFORM_MEMORY_SETTINGS_VERSION
  57  * is employed allowing the mainboard and SoC to supply their own version
  58  * for memory settings respectively. The valid values are 0-15 for each
  59  * function.
  60  */
  61 uint8_t fsp_memory_mainboard_version(void);
  62 uint8_t fsp_memory_soc_version(void);
  63
  64 /* Callback after processing FSP notify */
  65 void platform_fsp_notify_status(enum fsp_notify_phase phase);
  66
  67 /* Initialize memory margin analysis settings. */
  68 void setup_mma(FSP_M_CONFIG *memory_cfg);
  69 /* Update the SOC specific logo param and load the logo. */
  70 void soc_load_logo(FSPS_UPD *supd);
  71 /* Update the SOC specific memory config param for mma. */
  72 void soc_update_memory_params_for_mma(FSP_M_CONFIG *memory_cfg,
  73         struct mma_config_param *mma_cfg);
  74
  75 /*
  76  * As per FSP integration guide:
  77  * If bootloader needs to take control of APs back, a full AP re-initialization is
  78  * required after FSP-S is completed and control has been transferred back to bootloader
  79  */
  80 void do_mpinit_after_fsp(void);
  81
  82 /*
  83  * # DOCUMENTATION:
  84  *
  85  * This file defines the interface between coreboot and the FSP 2.0 wrapper
  86  * fsp_memory_init(), fsp_silicon_init(), and fsp_notify() are the main entry
  87  * points and map 1:1 to the FSP entry points of the same name.
  88  *
  89  * ### fsp_memory_init():
  90  *     - s3wake: boolean indicating if the system is waking from resume
  91  *
  92  * This function is responsible for loading and executing the memory
  93  * initialization code from the FSP-M binary. It expects this binary to reside
  94  * in cbfs as FSP_M_FILE.
  95  *
  96  * The function takes one parameter, which is described above, but does not
  97  * take in memory parameters as an argument. The memory parameters can be filled
  98  * in with platform_fsp_memory_init_params_cb(). This is a callback symbol
  99  * that fsp_memory_init() will call. The platform must provide this symbol.
 100  *
 101  *
 102  * ### fsp_silicon_init():
 103  *
 104  * This function is responsible for loading and executing the silicon
 105  * initialization code from the FSP-S binary. It expects this binary to reside
 106  * in cbfs as FSP_S_FILE.
 107  *
 108  * Like fsp_memory_init(), it provides a callback to fill in FSP-specific
 109  * parameters, via platform_fsp_silicon_init_params_cb(). The platform must
 110  * also provide this symbol.
 111  *
 112  *
 113  * ### fsp_notify():
 114  *     - phase: Which FSP notification phase
 115  *
 116  * This function is responsible for loading and executing the notify code from
 117  * the FSP-S binary. It expects that fsp_silicon_init() has already been called
 118  * successfully, and that the FSP-S binary is still loaded into memory.
 119  */
 120
 121 #endif /* _FSP2_0_API_H_ */