1 ## SPDX-License-Identifier: GPL-2.0-only
3 config EC_GOOGLE_CHROMEEC
5 select EC_SUPPORTS_DPTF_TEVT
11 config EC_GOOGLE_CHROMEEC_ACPI_MEMMAP
12 depends on EC_GOOGLE_CHROMEEC_LPC
15 When defined, ACPI accesses EC memmap data on ports 66h/62h. When
16 not defined, the memmap data is instead accessed on 900h-9ffh via
19 config EC_GOOGLE_CHROMEEC_ACPI_USB_PORT_POWER
22 Expose methods for enabling and disabling port power on individual USB
25 config EC_GOOGLE_CHROMEEC_BOARDID
28 Provides common routine for reading boardid from Chrome EC.
30 config EC_GOOGLE_CHROMEEC_I2C
34 Google's Chrome EC via I2C bus.
36 config EC_GOOGLE_CHROMEEC_I2C_BUS
37 depends on EC_GOOGLE_CHROMEEC_I2C
38 hex "I2C bus for Google's Chrome EC"
40 config EC_GOOGLE_CHROMEEC_I2C_CHIP
41 depends on EC_GOOGLE_CHROMEEC_I2C
45 config EC_GOOGLE_CHROMEEC_I2C_PROTO3
46 depends on EC_GOOGLE_CHROMEEC_I2C
50 Use only proto3 for i2c EC communication.
52 config EC_GOOGLE_CHROMEEC_ESPI
53 depends on ARCH_X86 # Needs Plug-and-play.
55 select EC_GOOGLE_CHROMEEC_LPC
57 Google Chrome EC via eSPI bus.
59 The EC communication code is the same between eSPI and LPC, so
60 this option simply enables the LPC EC code. The eSPI device
61 still needs to correctly configure the bus transactions.
63 config EC_GOOGLE_CHROMEEC_MEMMAP_INDEXED_IO
64 depends on EC_GOOGLE_CHROMEEC && ARCH_X86
67 Google Chrome EC enable support for indexed I/O access.
69 Indexed I/O allows devices with multiple memory locations to be
70 accessed using a single I/O port base address and an index register.
71 A separate data register, typically located at the address
72 immediately following the index register, is used for sending and
73 receiving data to the device.
75 Ensure port address and gen3_dec values are correct when selecting
78 config EC_GOOGLE_CHROMEEC_MEMMAP_INDEXED_IO_PORT
79 depends on EC_GOOGLE_CHROMEEC_MEMMAP_INDEXED_IO
83 Google Chrome EC indexed I/O access address.
85 Index register port address for memory mapped indexed IO access
87 config EC_GOOGLE_CHROMEEC_LPC
88 depends on ARCH_X86 # Needs Plug-and-play.
91 Google Chrome EC via LPC bus.
93 config EC_GOOGLE_CHROMEEC_MEC
94 depends on EC_GOOGLE_CHROMEEC_LPC
96 select EC_GOOGLE_CHROMEEC_ACPI_MEMMAP
97 select EC_GOOGLE_COMMON_MEC
99 Microchip EC variant for LPC register access.
101 config EC_GOOGLE_CHROMEEC_PD
104 Indicates that Google's Chrome USB PD chip is present.
106 config EC_GOOGLE_CHROMEEC_SPI
109 Google's Chrome EC via SPI bus.
111 config EC_GOOGLE_CHROMEEC_SPI_BUS
112 depends on EC_GOOGLE_CHROMEEC_SPI
115 config EC_GOOGLE_CHROMEEC_SPI_WAKEUP_DELAY_US
116 depends on EC_GOOGLE_CHROMEEC_SPI
120 Force delay after asserting /CS to allow EC to wakeup.
122 config EC_GOOGLE_CHROMEEC_SPI_CHIP
123 depends on EC_GOOGLE_CHROMEEC_SPI
127 config EC_GOOGLE_CHROMEEC_SKUID
130 Provides common routine for reporting the skuid to ChromeOS.
132 config EC_GOOGLE_CHROMEEC_RTC
133 bool "Enable ChromeOS EC RTC"
135 Enable support for the real-time clock on the ChromeOS EC. This
136 uses the EC_CMD_RTC_GET_VALUE command to read the current time.
138 config EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL
139 bool "Include an external EC firmware binary"
141 Include a precompiled EC firmware binary in the image.
143 config EC_GOOGLE_CHROMEEC_FIRMWARE_FILE
144 string "Chrome EC firmware path and filename"
145 depends on EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL
147 The path and filename of the EC firmware file to use.
149 config EC_GOOGLE_CHROMEEC_PD_FIRMWARE_EXTERNAL
150 bool "Include an external PD firmware binary"
151 depends on EC_GOOGLE_CHROMEEC_PD
153 Include a precompiled PD firmware binary in the image.
155 config EC_GOOGLE_CHROMEEC_PD_FIRMWARE_FILE
156 string "Chrome EC firmware path and filename for PD"
157 depends on EC_GOOGLE_CHROMEEC_PD_FIRMWARE_EXTERNAL
159 The path and filename of the PD firmware file to use.
161 config EC_GOOGLE_CHROMEEC_SWITCHES
165 Enable support for ChromeOS mode switches provided by the ChromeOS
168 config EC_GOOGLE_CHROMEEC_INCLUDE_SSFC_IN_FW_CONFIG
169 depends on FW_CONFIG_SOURCE_CHROMEEC_CBI
172 Fetch Second Source Factory Cache from CBI EEPROM and add it in the most significant
173 32 bits of firmware configuration.
175 config EC_GOOGLE_CHROMEEC_AUTO_FAN_CTRL
176 bool "Enable automatic fan control"
178 Put the fan in auto mode at boot.
180 config EC_GOOGLE_CHROMEEC_READ_BATTERY_LONG_STRING
181 depends on TPM_GOOGLE
185 The Chrome EC currently supports two ways to read battery strings on
188 * Read up to 8 bytes from EC shared memory BMFG, BMOD, ...
189 * Send a EC_CMD_BATTERY_GET_STATIC host command and read longer strings as a response.
191 Select this config to support readout of longer battery strings.
195 config EC_GOOGLE_CHROMEEC_LPC_GENERIC_MEMORY_RANGE
198 Select this option to access LPC GMR (Generic Memory Range) Register to
199 implement MMIO based communication between EC and AP firmware.
201 endif # EC_GOOGLE_CHROMEEC
203 source "src/ec/google/chromeec/*/Kconfig"