1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * ChromeOS Embedded Controller interface
6 * Constants that should be defined:
8 * SIO_EC_MEMMAP_ENABLE : Enable EC LPC memory map resources
9 * EC_LPC_ADDR_MEMMAP : Base address of memory map range
10 * EC_MEMMAP_SIZE : Size of memory map range
12 * SIO_EC_HOST_ENABLE : Enable EC host command interface resources
13 * EC_LPC_ADDR_HOST_DATA : EC host command interface data port
14 * EC_LPC_ADDR_HOST_CMD : EC host command interface command port
15 * EC_HOST_CMD_REGION0 : EC host command buffer
16 * EC_HOST_CMD_REGION1 : EC host command buffer
17 * EC_HOST_CMD_REGION_SIZE : EC host command buffer size
20 // Scope is \_SB.PCI0.LPCB
26 #ifdef SIO_EC_MEMMAP_ENABLE
28 Name (_HID, EISAID ("PNP0C02"))
31 Method (_STA, 0, NotSerialized) {
35 Name (_CRS, ResourceTemplate ()
37 IO (Decode16, EC_LPC_ADDR_MEMMAP, EC_LPC_ADDR_MEMMAP,
43 #ifdef SIO_EC_HOST_ENABLE
45 Name (_HID, EISAID ("PNP0C02"))
48 Method (_STA, 0, NotSerialized) {
52 Name (_CRS, ResourceTemplate ()
55 EC_LPC_ADDR_HOST_DATA, EC_LPC_ADDR_HOST_DATA,
58 EC_LPC_ADDR_HOST_CMD, EC_LPC_ADDR_HOST_CMD,
61 EC_HOST_CMD_REGION0, EC_HOST_CMD_REGION0, 0x08,
62 EC_HOST_CMD_REGION_SIZE)
64 EC_HOST_CMD_REGION1, EC_HOST_CMD_REGION1, 0x08,
65 EC_HOST_CMD_REGION_SIZE)
70 #ifdef SIO_EC_ENABLE_COM1
72 Name (_HID, EISAID ("PNP0501"))
75 Method (_STA, 0, NotSerialized) {
79 Name (_CRS, ResourceTemplate ()
81 IO (Decode16, 0x03F8, 0x3F8, 0x08, 0x08)
88 #ifdef SIO_EC_ENABLE_PS2K
91 Device (PS2K) // Keyboard
94 Name (_HID, "GOOG000A")
95 Name (_CID, Package() { EISAID("PNP0303"), EISAID("PNP030B") } )
97 Method (_STA, 0, NotSerialized) {
101 Name (_CRS, ResourceTemplate()
103 IO (Decode16, 0x60, 0x60, 0x01, 0x01)
104 IO (Decode16, 0x64, 0x64, 0x01, 0x01)
105 #ifdef SIO_EC_PS2K_IRQ
108 IRQ (Edge, ActiveHigh, Exclusive) {1}
115 #ifdef SIO_EC_ENABLE_PS2M
118 Device (PS2M) // Mouse
121 Name (_HID, "GOOG0015")
122 Name (_CID, Package() { EISAID("PNP0F13") } )
124 Method (_STA, 0, NotSerialized) {
128 Name (_CRS, ResourceTemplate()
130 IO (Decode16, 0x60, 0x60, 0x01, 0x01)
131 IO (Decode16, 0x64, 0x64, 0x01, 0x01)
132 #ifdef SIO_EC_PS2M_IRQ
135 IRQ (Edge, ActiveHigh, Exclusive) {12}