libpayload: configs: Add new config.featuretest to broaden CI
[coreboot.git] / src / mainboard / asrock / g41c-gs / hda_verb.c
blob134c34092f1689c5d5f55c3becfb222ed5718b8b
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #include <device/azalia_device.h>
5 const u32 cim_verb_data[] = {
6 /* coreboot specific header */
7 /* Realtek ALC662 rev1 */
8 0x10ec0662, /* Vendor ID */
9 0x18493662, /* Subsystem ID */
10 10, /* Number of entries */
12 /* Pin Widget Verb Table */
14 AZALIA_PIN_CFG(0, 0x14, 0x01014010),
15 AZALIA_PIN_CFG(0, 0x15, AZALIA_PIN_CFG_NC(0)),
16 AZALIA_PIN_CFG(0, 0x16, AZALIA_PIN_CFG_NC(0)),
17 AZALIA_PIN_CFG(0, 0x18, 0x01a19830),
18 AZALIA_PIN_CFG(0, 0x19, 0x02a19940),
19 AZALIA_PIN_CFG(0, 0x1a, 0x0181303f),
20 AZALIA_PIN_CFG(0, 0x1b, 0x02214120),
21 AZALIA_PIN_CFG(0, 0x1c, 0x593301f0),
22 AZALIA_PIN_CFG(0, 0x1d, 0x4004c601),
23 AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
25 /* coreboot specific header */
26 /* Intel Eaglelake HDMI */
27 0x80862803, /* Vendor ID */
28 0x80860101, /* Subsystem ID */
29 0x00000001, /* Number of entries */
31 /* Pin Widget Verb Table */
33 AZALIA_PIN_CFG(1, 0x03, 0x18560010),
35 /* coreboot specific header */
36 /* Realtek ALC662 rev1 */
37 0x10ec0662, /* Vendor ID */
38 0x1565821e, /* Subsystem ID */
39 10, /* Number of entries */
41 /* Pin Widget Verb Table */
42 AZALIA_PIN_CFG(2, 0x14, 0x01014410),
43 AZALIA_PIN_CFG(2, 0x15, AZALIA_PIN_CFG_NC(0)),
44 AZALIA_PIN_CFG(2, 0x16, AZALIA_PIN_CFG_NC(0)),
45 AZALIA_PIN_CFG(2, 0x18, 0x01a19c30),
46 AZALIA_PIN_CFG(2, 0x19, 0x02a19c40),
47 AZALIA_PIN_CFG(2, 0x1a, 0x0181343f),
48 AZALIA_PIN_CFG(2, 0x1b, 0x02214c20),
49 AZALIA_PIN_CFG(2, 0x1c, AZALIA_PIN_CFG_NC(0)),
50 AZALIA_PIN_CFG(2, 0x1d, 0x4004c601),
51 AZALIA_PIN_CFG(2, 0x1e, AZALIA_PIN_CFG_NC(0)),
54 const u32 pc_beep_verbs[0] = {};
56 AZALIA_ARRAY_SIZES;