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util/crossgcc/buildgcc: Add riscv64-elf to targets
[coreboot.git] / src / mainboard / google / brya / variants / glassway / overridetree.cb
blob684fd83db1f224c59671c135911e32e88f31d206
1 fw_config
2 field THERMAL_SOLUTION 0
3 option THERMAL_SOLUTION_PASSIVE 0
4 option THERMAL_SOLUTION_ACTIVE 1
5 end
6 field AUDIO 2 4
7 option AUDIO_ALC1019_ALC5682IVS 0
8 option AUDIO_ALC5650_ALC5650 1
9 end
10 field DB_USB 5 7
11 option DB_NONE 0
12 option DB_1C 1
13 option DB_1A 2
14 option DB_1C_1A 3
15 option DB_1C_LTE 4
16 option DB_HDMI_LTE 5
17 end
18 field SD_CARD 8
19 option SD_ABSENT 0
20 option SD_GL9750S 1
21 end
22 field WIFI_SAR_ID 10 12
23 option WIFI_SAR_ID_0 0
24 option WIFI_SAR_ID_1 1
25 option WIFI_SAR_ID_INTEL_CONVERTIBLE 2
26 option WIFI_SAR_ID_INTEL_CLAMSHELL 3
27 end
28 field STYLUS 14
29 option STYLUS_ABSENT 0
30 option STYLUS_PRESENT 1
31 end
32 field WFC 16 17
33 option WFC_ABSENT 0
34 option WFC_PRESENT 1
35 end
36 field TOUCHSCREEN_SOURCE 32 34
37 option TOUCHSCREEN_UNPROVISIONED 0
38 option TOUCHSCREEN_ELAN0001 1
39 option TOUCHSCREEN_GTCH7503 2
40 option TOUCHSCREEN_ELAN9004 3
41 option TOUCHSCREEN_ILIT2901 4
42 end
43 end
44
45 chip soc/intel/alderlake
46 register "sagv" = "SaGv_Enabled"
47
48 # EMMC Tx CMD Delay
49 # Refer to EDS-Vol2-42.3.7.
50 # [14:8] steps of delay for DDR mode, each 125ps, range: 0 - 39.
51 # [6:0] steps of delay for SDR mode, each 125ps, range: 0 - 39.
52 register "common_soc_config.emmc_dll.emmc_tx_cmd_cntl" = "0x505"
53
54 # EMMC TX DATA Delay 1
55 # Refer to EDS-Vol2-42.3.8.
56 # [14:8] steps of delay for HS400, each 125ps, range: 0 - 78.
57 # [6:0] steps of delay for SDR104/HS200, each 125ps, range: 0 - 79.
58 register "common_soc_config.emmc_dll.emmc_tx_data_cntl1" = "0x909"
59
60 # EMMC TX DATA Delay 2
61 # Refer to EDS-Vol2-42.3.9.
62 # [30:24] steps of delay for SDR50, each 125ps, range: 0 - 79.
63 # [22:16] steps of delay for DDR50, each 125ps, range: 0 - 78.
64 # [14:8] steps of delay for SDR25/HS50, each 125ps, range: 0 -79.
65 # [6:0] steps of delay for SDR12, each 125ps. Range: 0 - 79.
66 register "common_soc_config.emmc_dll.emmc_tx_data_cntl2" = "0x1C2A2828"
67
68 # EMMC RX CMD/DATA Delay 1
69 # Refer to EDS-Vol2-42.3.10.
70 # [30:24] steps of delay for SDR50, each 125ps, range: 0 - 119.
71 # [22:16] steps of delay for DDR50, each 125ps, range: 0 - 78.
72 # [14:8] steps of delay for SDR25/HS50, each 125ps, range: 0 - 119.
73 # [6:0] steps of delay for SDR12, each 125ps, range: 0 - 119.
74 register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl1" = "0x1C1B4F1B"
75
76 # EMMC RX CMD/DATA Delay 2
77 # Refer to EDS-Vol2-42.3.12.
78 # [17:16] stands for Rx Clock before Output Buffer,
79 # 00: Rx clock after output buffer,
80 # 01: Rx clock before output buffer,
81 # 10: Automatic selection based on working mode.
82 # 11: Reserved
83 # [14:8] steps of delay for Auto Tuning Mode, each 125ps, range: 0 - 39.
84 # [6:0] steps of delay for HS200, each 125ps, range: 0 - 79.
85 register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl2" = "0x10048"
86
87 # EMMC Rx Strobe Delay
88 # Refer to EDS-Vol2-42.3.11.
89 # [14:8] Rx Strobe Delay DLL 1(HS400 Mode), each 125ps, range: 0 - 39.
90 # [6:0] Rx Strobe Delay DLL 2(HS400 Mode), each 125ps, range: 0 - 39.
91 register "common_soc_config.emmc_dll.emmc_rx_strobe_cntl" = "0x01515"
92
93 # SOC Aux orientation override:
94 # This is a bitfield that corresponds to up to 4 TCSS ports.
95 # Bits (0,1) allocated for TCSS Port1 configuration and Bits (2,3)for TCSS Port2.
96 # TcssAuxOri = 0101b
97 # Bit0,Bit2 set to "1" indicates no retimer on USBC Ports
98 # Bit1,Bit3 set to "0" indicates Aux lines are not swapped on the
99 # motherboard to USBC connector
100 register "tcss_aux_ori" = "5"
101
102 register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}"
103 register "typec_aux_bias_pads[1]" = "{.pad_auxp_dc = GPP_A21, .pad_auxn_dc = GPP_A22}"
104
105 register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # WFC
106 register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for CNVi WLAN
107
108 # Configure external V1P05/Vnn/VnnSx Rails
109 register "ext_fivr_settings" = "{
110 .configure_ext_fivr = 1,
111 .v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX & ~FIVR_ENABLE_S0,
112 .vnn_enable_bitmap = FIVR_ENABLE_ALL_SX,
113 .vnn_sx_enable_bitmap = FIVR_ENABLE_ALL_SX,
114 .v1p05_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL,
115 .vnn_supported_voltage_bitmap = FIVR_VOLTAGE_MIN_ACTIVE,
116 .v1p05_voltage_mv = 1050,
117 .vnn_voltage_mv = 780,
118 .vnn_sx_voltage_mv = 1050,
119 .v1p05_icc_max_ma = 500,
120 .vnn_icc_max_ma = 500,
121 }"
122
123 # Enable the Cnvi BT Audio Offload
124 register "cnvi_bt_audio_offload" = "1"
125
126 # Intel Common SoC Config
127 #+-------------------+---------------------------+
128 #| Field | Value |
129 #+-------------------+---------------------------+
130 #| I2C0 | TPM. Early init is |
131 #| | required to set up a BAR |
132 #| | for TPM communication |
133 #| I2C1 | Touchscreen |
134 #| I2C2 | Sub-board(PSensor)/WCAM |
135 #| I2C3 | Audio |
136 #| I2C5 | Trackpad |
137 #+-------------------+---------------------------+
138 register "common_soc_config" = "{
139 .i2c[0] = {
140 .early_init = 1,
141 .speed = I2C_SPEED_FAST_PLUS,
142 .speed_config[0] = {
143 .speed = I2C_SPEED_FAST_PLUS,
144 .scl_lcnt = 55,
145 .scl_hcnt = 30,
146 .sda_hold = 7,
147 }
148 },
149 .i2c[1] = {
150 .speed = I2C_SPEED_FAST,
151 .speed_config[0] = {
152 .speed = I2C_SPEED_FAST,
153 .scl_lcnt = 157,
154 .scl_hcnt = 79,
155 .sda_hold = 40,
156 }
157 },
158 .i2c[2] = {
159 .speed = I2C_SPEED_FAST,
160 .speed_config[0] = {
161 .speed = I2C_SPEED_FAST,
162 .scl_lcnt = 157,
163 .scl_hcnt = 79,
164 .sda_hold = 7,
165 }
166 },
167 .i2c[3] = {
168 .speed = I2C_SPEED_FAST,
169 .speed_config[0] = {
170 .speed = I2C_SPEED_FAST,
171 .scl_lcnt = 158,
172 .scl_hcnt = 79,
173 .sda_hold = 7,
174 }
175 },
176 .i2c[5] = {
177 .speed = I2C_SPEED_FAST,
178 .speed_config[0] = {
179 .speed = I2C_SPEED_FAST,
180 .scl_lcnt = 158,
181 .scl_hcnt = 79,
182 .sda_hold = 40,
183 }
184 },
185 }"
186
187 device domain 0 on
188 device ref dtt on
189 chip drivers/intel/dptf
190 ## sensor information
191 register "options.tsr[0].desc" = ""Memory""
192 register "options.tsr[1].desc" = ""Charger""
193 register "options.tsr[2].desc" = ""Ambient""
194
195 # TODO: below values are initial reference values only
196 ## Passive Policy
197 register "policies.passive" = "{
198 [0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
199 [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 75, 5000),
200 [2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_1, 75, 5000),
201 [3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 75, 5000),
202 }"
203
204 ## Critical Policy
205 register "policies.critical" = "{
206 [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
207 [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 85, SHUTDOWN),
208 [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 85, SHUTDOWN),
209 [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 85, SHUTDOWN),
210 }"
211
212 register "controls.power_limits" = "{
213 .pl1 = {
214 .min_power = 3000,
215 .max_power = 6000,
216 .time_window_min = 28 * MSECS_PER_SEC,
217 .time_window_max = 32 * MSECS_PER_SEC,
218 .granularity = 200
219 },
220 .pl2 = {
221 .min_power = 25000,
222 .max_power = 25000,
223 .time_window_min = 1,
224 .time_window_max = 1,
225 .granularity = 1000
226 }
227 }"
228
229 ## Charger Performance Control (Control, mA)
230 register "controls.charger_perf" = "{
231 [0] = { 255, 1700 },
232 [1] = { 24, 1500 },
233 [2] = { 16, 1000 },
234 [3] = { 8, 500 }
235 }"
236
237 device generic 0 on
238 probe THERMAL_SOLUTION THERMAL_SOLUTION_PASSIVE
239 end
240 end
241 chip drivers/intel/dptf
242 ## sensor information
243 register "options.tsr[0].desc" = ""Memory""
244 register "options.tsr[1].desc" = ""Charger""
245 register "options.tsr[2].desc" = ""Ambient""
246
247 # TODO: below values are initial reference values only
248 ## Active Policy
249 register "policies.active" = "{
250 [0] = {
251 .target = DPTF_CPU,
252 .thresholds = {
253 TEMP_PCT(85, 90),
254 TEMP_PCT(80, 80),
255 TEMP_PCT(75, 70),
256 TEMP_PCT(70, 50),
257 TEMP_PCT(65, 30),
258 }
259 },
260 [1] = {
261 .target = DPTF_TEMP_SENSOR_2,
262 .thresholds = {
263 TEMP_PCT(50, 90),
264 TEMP_PCT(48, 70),
265 TEMP_PCT(46, 60),
266 TEMP_PCT(43, 40),
267 TEMP_PCT(40, 30),
268 }
269 }
270 }"
271
272 # TODO: below values are initial reference values only
273 ## Passive Policy
274 register "policies.passive" = "{
275 [0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
276 [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 75, 5000),
277 [2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_1, 75, 5000),
278 [3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 75, 5000),
279 }"
280
281 ## Critical Policy
282 register "policies.critical" = "{
283 [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
284 [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 85, SHUTDOWN),
285 [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 85, SHUTDOWN),
286 [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 85, SHUTDOWN),
287 }"
288
289 register "controls.power_limits" = "{
290 .pl1 = {
291 .min_power = 12000,
292 .max_power = 15000,
293 .time_window_min = 28 * MSECS_PER_SEC,
294 .time_window_max = 32 * MSECS_PER_SEC,
295 .granularity = 200
296 },
297 .pl2 = {
298 .min_power = 35000,
299 .max_power = 35000,
300 .time_window_min = 1,
301 .time_window_max = 1,
302 .granularity = 1000
303 }
304 }"
305
306 ## Charger Performance Control (Control, mA)
307 register "controls.charger_perf" = "{
308 [0] = { 255, 1700 },
309 [1] = { 24, 1500 },
310 [2] = { 16, 1000 },
311 [3] = { 8, 500 }
312 }"
313
314 ## Fan Performance Control (Percent, Speed, Noise, Power)
315 register "controls.fan_perf" = "{
316 [0] = { 100, 6000, 220, 2200, },
317 [1] = { 92, 5500, 180, 1800, },
318 [2] = { 85, 5000, 145, 1450, },
319 [3] = { 70, 4400, 115, 1150, },
320 [4] = { 56, 3900, 90, 900, },
321 [5] = { 45, 3300, 55, 550, },
322 [6] = { 38, 3000, 30, 300, },
323 [7] = { 33, 2900, 15, 150, },
324 [8] = { 10, 800, 10, 100, },
325 [9] = { 0, 0, 0, 50, }
326 }"
327
328 ## Fan options
329 register "options.fan.fine_grained_control" = "true"
330 register "options.fan.step_size" = "2"
331
332 device generic 1 on
333 probe THERMAL_SOLUTION THERMAL_SOLUTION_ACTIVE
334 end
335 end
336 end
337 device ref cnvi_wifi on
338 chip drivers/wifi/generic
339 register "enable_cnvi_ddr_rfim" = "true"
340 device generic 0 on end
341 end
342 end
343 device ref i2c1 on
344 chip drivers/i2c/generic
345 register "hid" = ""ELAN0001""
346 register "desc" = ""ELAN Touchscreen""
347 register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
348 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
349 register "reset_delay_ms" = "20"
350 register "reset_off_delay_ms" = "4"
351 register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
352 register "stop_delay_ms" = "5"
353 register "stop_off_delay_ms" = "25"
354 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
355 register "enable_delay_ms" = "25"
356 register "has_power_resource" = "true"
357 device i2c 10 on
358 probe TOUCHSCREEN_SOURCE TOUCHSCREEN_UNPROVISIONED
359 probe TOUCHSCREEN_SOURCE TOUCHSCREEN_ELAN0001
360 end
361 end
362
363 chip drivers/i2c/hid
364 register "generic.hid" = ""GTCH7503""
365 register "generic.desc" = ""G2TOUCH Touchscreen""
366 register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
367 register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
368 register "generic.reset_delay_ms" = "50"
369 register "generic.reset_off_delay_ms" = "5"
370 register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
371 register "generic.stop_delay_ms" = "30"
372 register "generic.stop_off_delay_ms" = "10"
373 register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
374 register "generic.enable_delay_ms" = "5"
375 register "generic.has_power_resource" = "1"
376 register "hid_desc_reg_offset" = "0x01"
377 device i2c 40 on
378 probe TOUCHSCREEN_SOURCE TOUCHSCREEN_GTCH7503
379 end
380 end
381 chip drivers/i2c/hid
382 register "generic.hid" = ""ELAN9004""
383 register "generic.desc" = ""ELAN Touchscreen""
384 register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
385 register "generic.detect" = "1"
386 register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
387 register "generic.reset_delay_ms" = "20"
388 register "generic.reset_off_delay_ms" = "2"
389 register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
390 register "generic.enable_delay_ms" = "6"
391 register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
392 register "generic.stop_delay_ms" = "150"
393 register "generic.stop_off_delay_ms" = "2"
394 register "generic.has_power_resource" = "1"
395 register "hid_desc_reg_offset" = "0x01"
396 device i2c 10 on
397 probe TOUCHSCREEN_SOURCE TOUCHSCREEN_ELAN9004
398 end
399 end
400 chip drivers/i2c/hid
401 register "generic.hid" = ""ILIT2901""
402 register "generic.desc" = ""ILI Touchscreen""
403 register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
404 register "generic.detect" = "1"
405 register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
406 register "generic.reset_delay_ms" = "10"
407 register "generic.reset_off_delay_ms" = "4"
408 register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
409 register "generic.enable_delay_ms" = "12"
410 register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
411 register "generic.stop_delay_ms" = "105"
412 register "generic.stop_off_delay_ms" = "5"
413 register "generic.has_power_resource" = "1"
414 register "hid_desc_reg_offset" = "0x01"
415 device i2c 41 on
416 probe TOUCHSCREEN_SOURCE TOUCHSCREEN_ILIT2901
417 end
418 end
419 chip drivers/generic/gpio_keys
420 register "name" = ""PENH""
421 register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_LOW(GPP_F13)"
422 register "key.wake_gpe" = "GPE0_DW2_15"
423 register "key.wakeup_route" = "WAKEUP_ROUTE_SCI"
424 register "key.wakeup_event_action" = "EV_ACT_DEASSERTED"
425 register "key.dev_name" = ""EJCT""
426 register "key.linux_code" = "SW_PEN_INSERTED"
427 register "key.linux_input_type" = "EV_SW"
428 register "key.label" = ""pen_eject""
429 device generic 0 on
430 probe STYLUS STYLUS_PRESENT
431 end
432 end
433 end #I2C1
434 device ref i2c2 on
435 chip drivers/i2c/sx9324
436 register "desc" = ""SAR Proximity Sensor""
437 register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_H19_IRQ)"
438 register "speed" = "I2C_SPEED_FAST"
439 register "uid" = "1"
440 register "reg_gnrl_ctrl0" = "0x16"
441 register "reg_gnrl_ctrl1" = "0x21"
442 register "reg_afe_ctrl0" = "0x20"
443 register "reg_afe_ctrl3" = "0x00"
444 register "reg_afe_ctrl4" = "0x46"
445 register "reg_afe_ctrl6" = "0x00"
446 register "reg_afe_ctrl7" = "0x46"
447 register "reg_afe_ph0" = "0x3d"
448 register "reg_afe_ph1" = "0x1b"
449 register "reg_afe_ph2" = "0x1f"
450 register "reg_afe_ph3" = "0x3d"
451 register "reg_afe_ctrl8" = "0x12"
452 register "reg_afe_ctrl9" = "0x08"
453 register "reg_prox_ctrl0" = "0x0b"
454 register "reg_prox_ctrl1" = "0x0b"
455 register "reg_prox_ctrl2" = "0x20"
456 register "reg_prox_ctrl3" = "0x20"
457 register "reg_prox_ctrl4" = "0x0c"
458 register "reg_prox_ctrl5" = "0x00"
459 register "reg_prox_ctrl6" = "0x20"
460 register "reg_prox_ctrl7" = "0xc0"
461 register "reg_adv_ctrl0" = "0x00"
462 register "reg_adv_ctrl1" = "0x00"
463 register "reg_adv_ctrl2" = "0x00"
464 register "reg_adv_ctrl3" = "0x00"
465 register "reg_adv_ctrl4" = "0x00"
466 register "reg_adv_ctrl5" = "0x05"
467 register "reg_adv_ctrl6" = "0x00"
468 register "reg_adv_ctrl7" = "0x00"
469 register "reg_adv_ctrl8" = "0x00"
470 register "reg_adv_ctrl9" = "0x00"
471 register "reg_adv_ctrl10" = "0x00"
472 register "reg_adv_ctrl11" = "0x00"
473 register "reg_adv_ctrl12" = "0x00"
474 register "reg_adv_ctrl13" = "0x00"
475 register "reg_adv_ctrl14" = "0x80"
476 register "reg_adv_ctrl15" = "0x0c"
477 register "reg_adv_ctrl16" = "0x04"
478 register "reg_adv_ctrl17" = "0x70"
479 register "reg_adv_ctrl18" = "0x20"
480 register "reg_adv_ctrl19" = "0x00"
481 register "reg_adv_ctrl20" = "0x00"
482 register "reg_irq_msk" = "0x60"
483 register "reg_irq_cfg0" = "0x00"
484 register "reg_irq_cfg1" = "0x80"
485 register "reg_irq_cfg2" = "0x00"
486
487 register "ph0_pin" = "{1, 3, 3}"
488 register "ph1_pin" = "{3, 2, 1}"
489 register "ph2_pin" = "{3, 3, 1}"
490 register "ph3_pin" = "{1, 3, 3}"
491 register "ph01_resolution" = "512"
492 register "ph23_resolution" = "512"
493 register "startup_sensor" = "1"
494 register "ph01_proxraw_strength" = "3"
495 register "ph23_proxraw_strength" = "3"
496 register "avg_pos_strength" = "256"
497 register "cs_idle_sleep" = ""gnd""
498 register "int_comp_resistor" = ""lowest""
499 register "input_precharge_resistor_ohms" = "4000"
500 register "input_analog_gain" = "1"
501 device i2c 28 on
502 probe DB_USB DB_1C_LTE
503 probe DB_USB DB_HDMI_LTE
504 end
505 end
506 end #I2C2
507 device ref i2c3 on
508 chip drivers/i2c/generic
509 register "hid" = ""RTL5682""
510 register "name" = ""RT58""
511 register "desc" = ""Headset Codec""
512 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
513 # Set the jd_src to RT5668_JD1 for jack detection
514 register "property_count" = "1"
515 register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
516 register "property_list[0].name" = ""realtek,jd-src""
517 register "property_list[0].integer" = "1"
518 device i2c 1a on
519 probe AUDIO AUDIO_ALC1019_ALC5682IVS
520 end
521 end
522 chip drivers/generic/alc1015
523 register "hid" = ""RTL1019""
524 register "sdb" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
525 device generic 1 on
526 probe AUDIO AUDIO_ALC1019_ALC5682IVS
527 end
528 end
529 chip drivers/i2c/generic
530 register "hid" = ""10EC5650""
531 register "name" = ""RT58""
532 register "desc" = ""Realtek RT5650""
533 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
534 register "property_count" = "1"
535 register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
536 register "property_list[0].name" = ""realtek,jd-mode""
537 register "property_list[0].integer" = "2"
538 device i2c 1a on
539 probe AUDIO AUDIO_ALC5650_ALC5650
540 end
541 end
542 end #I2C3
543 device ref i2c5 on
544 chip drivers/i2c/generic
545 register "hid" = ""ELAN0000""
546 register "desc" = ""ELAN Touchpad""
547 register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
548 register "wake" = "GPE0_DW2_14"
549 register "detect" = "1"
550 device i2c 15 on end
551 end
552 chip drivers/i2c/hid
553 register "generic.hid" = ""PNP0C50""
554 register "generic.desc" = ""PIXART Touchpad""
555 register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
556 register "generic.wake" = "GPE0_DW2_14"
557 register "generic.detect" = "1"
558 register "hid_desc_reg_offset" = "0x20"
559 device i2c 2c on end
560 end
561 end #I2C5
562 device ref pcie_rp4 on
563 # Enable wlan PCIe 4 using clk 2
564 register "pch_pcie_rp[PCH_RP(4)]" = "{
565 .clk_src = 2,
566 .clk_req = 2,
567 .flags = PCIE_RP_LTR | PCIE_RP_AER,
568 }"
569 chip drivers/wifi/generic
570 register "add_acpi_dma_property" = "true"
571 device pci 00.0 on end
572 end
573 end
574 device ref pcie_rp7 on
575 # Enable SD Card PCIe 7 using clk 3
576 register "pch_pcie_rp[PCH_RP(7)]" = "{
577 .clk_src = 3,
578 .clk_req = 3,
579 .flags = PCIE_RP_HOTPLUG | PCIE_RP_LTR | PCIE_RP_AER,
580 }"
581 chip soc/intel/common/block/pcie/rtd3
582 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H13)"
583 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H12)"
584 register "srcclk_pin" = "3"
585 device generic 0 on end
586 end
587 probe SD_CARD SD_GL9750S
588 end
589 device ref emmc on
590 probe STORAGE STORAGE_EMMC
591 end
592 device ref ish on
593 chip drivers/intel/ish
594 register "add_acpi_dma_property" = "true"
595 device generic 0 on end
596 end
597 probe STORAGE STORAGE_UFS
598 end
599 device ref ufs on
600 probe STORAGE STORAGE_UFS
601 end
602 device ref pch_espi on
603 chip ec/google/chromeec
604 use conn0 as mux_conn[0]
605 use conn1 as mux_conn[1]
606 device pnp 0c09.0 on end
607 end
608 end
609 device ref pmc hidden
610 chip drivers/intel/pmc_mux
611 device generic 0 on
612 chip drivers/intel/pmc_mux/conn
613 use usb2_port1 as usb2_port
614 use tcss_usb3_port1 as usb3_port
615 device generic 0 alias conn0 on end
616 end
617 chip drivers/intel/pmc_mux/conn
618 use usb2_port2 as usb2_port
619 use tcss_usb3_port2 as usb3_port
620 device generic 1 alias conn1 on
621 probe DB_USB DB_1C
622 probe DB_USB DB_1A
623 probe DB_USB DB_1C_1A
624 probe DB_USB DB_1C_LTE
625 end
626 end
627 end
628 end
629 end
630 device ref tcss_xhci on
631 chip drivers/usb/acpi
632 device ref tcss_root_hub on
633 chip drivers/usb/acpi
634 register "desc" = ""USB3 Type-C Port C0 (MLB)""
635 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
636 register "use_custom_pld" = "true"
637 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
638 device ref tcss_usb3_port1 on end
639 end
640 chip drivers/usb/acpi
641 register "desc" = ""USB3 Type-C Port C1 (DB)""
642 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
643 register "use_custom_pld" = "true"
644 register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
645 device ref tcss_usb3_port2 on
646 probe DB_USB DB_1C
647 probe DB_USB DB_1C_1A
648 probe DB_USB DB_1C_LTE
649 end
650 end
651 end
652 end
653 end
654 device ref xhci on
655 chip drivers/usb/acpi
656 device ref xhci_root_hub on
657 chip drivers/usb/acpi
658 register "desc" = ""USB2 Type-C Port C0 (MLB)""
659 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
660 register "use_custom_pld" = "true"
661 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
662 device ref usb2_port1 on end
663 end
664 chip drivers/usb/acpi
665 register "desc" = ""USB2 Type-C Port C1 (DB)""
666 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
667 register "use_custom_pld" = "true"
668 register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
669 device ref usb2_port2 on
670 probe DB_USB DB_1C
671 probe DB_USB DB_1C_1A
672 probe DB_USB DB_1C_LTE
673 end
674 end
675 chip drivers/usb/acpi
676 register "desc" = ""USB2 Type-A Port A0 (MLB)""
677 register "type" = "UPC_TYPE_A"
678 register "use_custom_pld" = "true"
679 register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
680 device ref usb2_port3 on end
681 end
682 chip drivers/usb/acpi
683 register "desc" = ""USB2 Type-A Port A1 (DB)""
684 register "type" = "UPC_TYPE_A"
685 register "use_custom_pld" = "true"
686 register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(4, 1))"
687 device ref usb2_port4 on
688 probe DB_USB DB_1A
689 probe DB_USB DB_1C_1A
690 end
691 end
692 chip drivers/usb/acpi
693 register "desc" = ""USB2 WWAN""
694 register "type" = "UPC_TYPE_INTERNAL"
695 device ref usb2_port4 on
696 probe DB_USB DB_1C_LTE
697 probe DB_USB DB_HDMI_LTE
698 end
699 end
700 chip drivers/usb/acpi
701 register "desc" = ""USB2 Camera""
702 register "type" = "UPC_TYPE_INTERNAL"
703 device ref usb2_port6 on end
704 end
705 chip drivers/usb/acpi
706 register "desc" = ""USB2 WFC""
707 register "type" = "UPC_TYPE_INTERNAL"
708 device ref usb2_port7 on
709 probe WFC WFC_PRESENT
710 end
711 end
712 chip drivers/usb/acpi
713 register "desc" = ""USB2 Bluetooth""
714 register "type" = "UPC_TYPE_INTERNAL"
715 register "reset_gpio" =
716 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
717 device ref usb2_port8 on end
718 end
719 chip drivers/usb/acpi
720 register "desc" = ""USB3 Type-A Port A0 (MLB)""
721 register "type" = "UPC_TYPE_USB3_A"
722 register "use_custom_pld" = "true"
723 register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
724 device ref usb3_port1 on end
725 end
726 chip drivers/usb/acpi
727 register "desc" = ""USB3 Type-A Port A1 (DB)""
728 register "type" = "UPC_TYPE_USB3_A"
729 register "use_custom_pld" = "true"
730 register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(4, 1))"
731 device ref usb3_port2 on
732 probe DB_USB DB_1A
733 probe DB_USB DB_1C_1A
734 end
735 end
736 chip drivers/usb/acpi
737 register "desc" = ""USB3 WWAN""
738 register "type" = "UPC_TYPE_INTERNAL"
739 device ref usb3_port2 on
740 probe DB_USB DB_1C_LTE
741 probe DB_USB DB_HDMI_LTE
742 end
743 end
744 end
745 end
746 end
747 end
748 end
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