src/mainboard/google/brya/variants/nereid/gpio.c

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2
   3 #include <baseboard/gpio.h>
   4 #include <baseboard/variants.h>
   5 #include <commonlib/helpers.h>
   6 #include <soc/gpio.h>
   7
   8 /* Pad configuration in ramstage */
   9 static const struct pad_config override_gpio_table[] = {
  10         /* A21 : GPP_A21 ==> USB_C1_AUX_DC_P */
  11         PAD_CFG_GPO(GPP_A21, 0, DEEP),
  12         /* A22 : GPP_A22 ==> USB_C1_AUX_DC_N */
  13         PAD_CFG_GPO(GPP_A22, 1, DEEP),
  14
  15         /* B5  : SOC_I2C_SUB_SDA */
  16         PAD_NC_LOCK(GPP_B5, NONE, LOCK_CONFIG),
  17         /* B6  : SOC_I2C_SUB_SCL */
  18         PAD_NC_LOCK(GPP_B6, NONE, LOCK_CONFIG),
  19
  20         /* D3  : WCAM_RST_L */
  21         PAD_NC_LOCK(GPP_D3, NONE, LOCK_CONFIG),
  22         /* D15 : EN_PP2800_WCAM_X */
  23         PAD_NC_LOCK(GPP_D15, NONE, LOCK_CONFIG),
  24         /* D16 : EN_PP1800_PP1200_WCAM_X */
  25         PAD_NC_LOCK(GPP_D16, NONE, LOCK_CONFIG),
  26
  27         /* H22 : WCAM_MCLK_R */
  28         PAD_NC(GPP_H22, NONE),
  29 };
  30
  31 /* Early pad configuration in bootblock */
  32 static const struct pad_config early_gpio_table[] = {
  33         /* H12 : UART0_RTS# ==> SD_PERST_L */
  34         PAD_CFG_GPO(GPP_H12, 0, DEEP),
  35         /* H20 : IMGCLKOUT1 ==> WLAN_PERST_L */
  36         PAD_CFG_GPO(GPP_H20, 0, DEEP),
  37         /* A13 : GPP_A13 ==> GSC_SOC_INT_ODL */
  38         PAD_CFG_GPI_APIC(GPP_A13, NONE, PLTRST, LEVEL, INVERT),
  39         /* E12 : THC0_SPI1_IO1 ==> SOC_WP_OD */
  40         PAD_CFG_GPI_GPIO_DRIVER(GPP_E12, NONE, DEEP),
  41         /* F18 : THC1_SPI2_INT# ==> EC_IN_RW_OD */
  42         PAD_CFG_GPI(GPP_F18, NONE, DEEP),
  43         /* H4  : I2C0_SDA ==> SOC_I2C_GSC_SDA */
  44         PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1),
  45         /* H5  : I2C0_SCL ==> SOC_I2C_GSC_SCL */
  46         PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1),
  47         /* H10 : UART0_RXD ==> UART_SOC_RX_DBG_TX */
  48         PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2),
  49         /* H11 : UART0_TXD ==> UART_SOC_TX_DBG_RX */
  50         PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2),
  51         /* H13 : UART0_CTS# ==> EN_PP3300_SD_X */
  52         PAD_CFG_GPO(GPP_H13, 1, DEEP),
  53 };
  54
  55 static const struct pad_config romstage_gpio_table[] = {
  56         /* Enable touchscreen, hold in reset */
  57         /* C0  : SMBCLK ==> EN_PP3300_TCHSCR */
  58         PAD_CFG_GPO(GPP_C0, 1, DEEP),
  59         /* C1  : SMBDATA ==> USI_RST_L */
  60         PAD_CFG_GPO(GPP_C1, 0, DEEP),
  61
  62         /* H12 : UART0_RTS# ==> SD_PERST_L */
  63         PAD_CFG_GPO(GPP_H12, 1, DEEP),
  64         /* H20 : IMGCLKOUT1 ==> WLAN_PERST_L */
  65         PAD_CFG_GPO(GPP_H20, 1, DEEP),
  66 };
  67
  68 const struct pad_config *variant_gpio_override_table(size_t *num)
  69 {
  70         *num = ARRAY_SIZE(override_gpio_table);
  71         return override_gpio_table;
  72 }
  73
  74 const struct pad_config *variant_early_gpio_table(size_t *num)
  75 {
  76         *num = ARRAY_SIZE(early_gpio_table);
  77         return early_gpio_table;
  78 }
  79
  80 const struct pad_config *variant_romstage_gpio_table(size_t *num)
  81 {
  82         *num = ARRAY_SIZE(romstage_gpio_table);
  83         return romstage_gpio_table;
  84 }