src/mainboard/google/brya/variants/quandiso/gpio.c

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2
   3 #include <baseboard/gpio.h>
   4 #include <baseboard/variants.h>
   5 #include <commonlib/helpers.h>
   6 #include <soc/gpio.h>
   7
   8 /* Pad configuration in ramstage */
   9 static const struct pad_config override_gpio_table[] = {
  10         /* A8  : WWAN_RF_DISABLE_ODL */
  11         PAD_CFG_GPO(GPP_A8, 1, DEEP),
  12         /* A18 : NC ==> HDMI_HPD_SRC */
  13         PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1),
  14         /* A21 : GPP_A21 ==> USB_C1_AUX_DC_P */
  15         PAD_CFG_GPO(GPP_A21, 0, DEEP),
  16         /* A22 : GPP_A22 ==> USB_C1_AUX_DC_N */
  17         PAD_CFG_GPO(GPP_A22, 1, DEEP),
  18
  19         /* C1  : SMBDATA ==> USI_RST_L */
  20         PAD_CFG_GPO(GPP_C1, 1, DEEP),
  21
  22         /* D3  : WCAM_RST_L ==> NC */
  23         PAD_NC_LOCK(GPP_D3, NONE, LOCK_CONFIG),
  24         /* D6  : WWAN_EN */
  25         PAD_CFG_GPO(GPP_D6, 1, DEEP),
  26         /* D15 : EN_PP2800_WCAM_X ==> NC */
  27         PAD_NC_LOCK(GPP_D15, NONE, LOCK_CONFIG),
  28         /* D16 : EN_PP1800_PP1200_WCAM_X ==> NC */
  29         PAD_NC_LOCK(GPP_D16, NONE, LOCK_CONFIG),
  30         /* D17 : NC ==> SD_WAKE_N */
  31         PAD_CFG_GPI_LOCK(GPP_D17, NONE, LOCK_CONFIG),
  32
  33         /* F6  : CNV_PA_BLANKING ==> NC */
  34         PAD_NC(GPP_F6, NONE),
  35         /* F12 : WWAN_RST_ODL */
  36         PAD_CFG_GPO_LOCK(GPP_F12, 1, LOCK_CONFIG),
  37         /* F23 : V1P05EXT_CTRL ==> NC */
  38         PAD_NC(GPP_F23, NONE),
  39
  40         /* H8  : CNV_MFUART2_RXD ==> NC */
  41         PAD_NC(GPP_H8, NONE),
  42         /* H9  : CNV_MFUART2_TXD ==> NC */
  43         PAD_NC(GPP_H9, NONE),
  44         /* H15 : HDMI_SRC_SCL */
  45         PAD_CFG_NF(GPP_H15, NONE, DEEP, NF1),
  46         /* H17 : HDMI_SRC_SDA */
  47         PAD_CFG_NF(GPP_H17, NONE, DEEP, NF1),
  48         /* H19 : SRCCLKREQ4# ==> P_SENSOR_INT_L */
  49         PAD_CFG_GPI_APIC(GPP_H19, NONE, PLTRST, LEVEL, NONE),
  50         /* H23 : WWAN_SAR_DETECT_ODL */
  51         PAD_CFG_GPO(GPP_H23, 1, DEEP),
  52 };
  53
  54 /* Early pad configuration in bootblock */
  55 static const struct pad_config early_gpio_table[] = {
  56         /* D6  : WWAN_EN */
  57         PAD_CFG_GPO(GPP_D6, 0, DEEP),
  58         /* H20 : IMGCLKOUT1 ==> WLAN_PERST_L */
  59         PAD_CFG_GPO(GPP_H20, 0, DEEP),
  60         /* A13 : GPP_A13 ==> GSC_SOC_INT_ODL */
  61         PAD_CFG_GPI_APIC(GPP_A13, NONE, PLTRST, LEVEL, INVERT),
  62         /* E12 : THC0_SPI1_IO1 ==> SOC_WP_OD */
  63         PAD_CFG_GPI_GPIO_DRIVER(GPP_E12, NONE, DEEP),
  64         /* F18 : THC1_SPI2_INT# ==> EC_IN_RW_OD */
  65         PAD_CFG_GPI(GPP_F18, NONE, DEEP),
  66         /* H4  : I2C0_SDA ==> SOC_I2C_GSC_SDA */
  67         PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1),
  68         /* H5  : I2C0_SCL ==> SOC_I2C_GSC_SCL */
  69         PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1),
  70         /* H10 : UART0_RXD ==> UART_SOC_RX_DBG_TX */
  71         PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2),
  72         /* H11 : UART0_TXD ==> UART_SOC_TX_DBG_RX */
  73         PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2),
  74         /* H12 : UART0_RTS# ==> SD_PERST_L */
  75         PAD_CFG_GPO(GPP_H12, 0, DEEP),
  76         /* H13 : UART0_CTS# ==> EN_PP3300_SD_X */
  77         PAD_CFG_GPO(GPP_H13, 1, DEEP),
  78         /* B11 : PMCALERT# ==> EN_PP3300_WLAN_X */
  79         PAD_CFG_GPO(GPP_B11, 1, DEEP),
  80         /* F12 : WWAN_RST_ODL */
  81         PAD_CFG_GPO(GPP_F12, 0, DEEP),
  82 };
  83
  84 static const struct pad_config romstage_gpio_table[] = {
  85         /* Enable touchscreen, hold in reset */
  86         /* C0  : SMBCLK ==> EN_PP3300_TCHSCR */
  87         PAD_CFG_GPO(GPP_C0, 1, DEEP),
  88         /* C1  : SMBDATA ==> USI_RST_L */
  89         PAD_CFG_GPO(GPP_C1, 0, DEEP),
  90         /* H12 : UART0_RTS# ==> SD_PERST_L */
  91         PAD_CFG_GPO(GPP_H12, 1, DEEP),
  92         /* H20 : IMGCLKOUT1 ==> WLAN_PERST_L */
  93         PAD_CFG_GPO(GPP_H20, 1, DEEP),
  94 };
  95
  96 const struct pad_config *variant_gpio_override_table(size_t *num)
  97 {
  98         *num = ARRAY_SIZE(override_gpio_table);
  99         return override_gpio_table;
 100 }
 101
 102 const struct pad_config *variant_early_gpio_table(size_t *num)
 103 {
 104         *num = ARRAY_SIZE(early_gpio_table);
 105         return early_gpio_table;
 106 }
 107
 108 const struct pad_config *variant_romstage_gpio_table(size_t *num)
 109 {
 110         *num = ARRAY_SIZE(romstage_gpio_table);
 111         return romstage_gpio_table;
 112 }