src/mainboard/google/brya/variants/riven/gpio.c

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2
   3 #include <baseboard/gpio.h>
   4 #include <baseboard/variants.h>
   5 #include <commonlib/helpers.h>
   6 #include <soc/gpio.h>
   7
   8 /* Pad configuration in ramstage for craask */
   9 static const struct pad_config override_gpio_table[] = {
  10         /* A8  : WWAN_RF_DISABLE_ODL */
  11         PAD_CFG_GPO(GPP_A8, 1, DEEP),
  12         /* A18 : NC ==> HDMI_HPD_SUB_ODL*/
  13         PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1),
  14         /* D6  : WWAN_EN */
  15         PAD_CFG_GPO(GPP_D6, 1, DEEP),
  16         /* D8  : SRCCLKREQ3# ==> NC */
  17         PAD_NC(GPP_D8, NONE),
  18         /* F12 : WWAN_RST_L */
  19         PAD_CFG_GPO_LOCK(GPP_F12, 1, LOCK_CONFIG),
  20         /* H12 : UART0_RTS# ==> NC */
  21         PAD_NC_LOCK(GPP_H12, NONE, LOCK_CONFIG),
  22         /* H13 : UART0_CTS# ==> NC */
  23         PAD_NC_LOCK(GPP_H13, NONE, LOCK_CONFIG),
  24         /* H15 : HDMI_SRC_DDC_SCL */
  25         PAD_CFG_NF(GPP_H15, NONE, DEEP, NF1),
  26         /* H17 : HDMI_SRC_DDC_SDA */
  27         PAD_CFG_NF(GPP_H17, NONE, DEEP, NF1),
  28         /* H19 : SOC_I2C_SUB_INT_ODL */
  29         PAD_CFG_GPI_APIC(GPP_H19, NONE, PLTRST, LEVEL, NONE),
  30         /* H23 : WWAN_SAR_DETECT_ODL */
  31         PAD_CFG_GPO(GPP_H23, 1, DEEP),
  32
  33         /* Configure the virtual CNVi Bluetooth I2S GPIO pads */
  34         /* BT_I2S_BCLK */
  35         PAD_CFG_NF(GPP_VGPIO_30, NONE, DEEP, NF3),
  36         /* BT_I2S_SYNC */
  37         PAD_CFG_NF(GPP_VGPIO_31, NONE, DEEP, NF3),
  38         /* BT_I2S_SDO */
  39         PAD_CFG_NF(GPP_VGPIO_32, NONE, DEEP, NF3),
  40         /* BT_I2S_SDI */
  41         PAD_CFG_NF(GPP_VGPIO_33, NONE, DEEP, NF3),
  42         /* SSP2_SCLK */
  43         PAD_CFG_NF(GPP_VGPIO_34, NONE, DEEP, NF1),
  44         /* SSP2_SFRM */
  45         PAD_CFG_NF(GPP_VGPIO_35, NONE, DEEP, NF1),
  46         /* SSP_TXD */
  47         PAD_CFG_NF(GPP_VGPIO_36, NONE, DEEP, NF1),
  48         /* SSP_RXD */
  49         PAD_CFG_NF(GPP_VGPIO_37, NONE, DEEP, NF1),
  50 };
  51
  52 /* Early pad configuration in bootblock */
  53 static const struct pad_config early_gpio_table[] = {
  54         /* F12 : GSXDOUT ==> WWAN_RST_L */
  55         PAD_CFG_GPO(GPP_F12, 0, DEEP),
  56         /* H20 : IMGCLKOUT1 ==> WLAN_PERST_L */
  57         PAD_CFG_GPO(GPP_H20, 0, DEEP),
  58         /* A13 : GPP_A13 ==> GSC_SOC_INT_ODL */
  59         PAD_CFG_GPI_APIC(GPP_A13, NONE, PLTRST, LEVEL, INVERT),
  60         /* D6  : SRCCLKREQ1# ==> WWAN_EN */
  61         PAD_CFG_GPO(GPP_D6, 1, DEEP),
  62         /* E12 : THC0_SPI1_IO1 ==> SOC_WP_OD */
  63         PAD_CFG_GPI_GPIO_DRIVER(GPP_E12, NONE, DEEP),
  64         /* F18 : THC1_SPI2_INT# ==> EC_IN_RW_OD */
  65         PAD_CFG_GPI(GPP_F18, NONE, DEEP),
  66         /* H4  : I2C0_SDA ==> SOC_I2C_GSC_SDA */
  67         PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1),
  68         /* H5  : I2C0_SCL ==> SOC_I2C_GSC_SCL */
  69         PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1),
  70         /* H10 : UART0_RXD ==> UART_SOC_RX_DBG_TX */
  71         PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2),
  72         /* H11 : UART0_TXD ==> UART_SOC_TX_DBG_RX */
  73         PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2),
  74 };
  75
  76 static const struct pad_config romstage_gpio_table[] = {
  77         /* Enable touchscreen, hold in reset */
  78         /* C0  : SMBCLK ==> EN_PP3300_TCHSCR */
  79         PAD_CFG_GPO(GPP_C0, 1, DEEP),
  80         /* C1  : SMBDATA ==> USI_RST_L */
  81         PAD_CFG_GPO(GPP_C1, 0, DEEP),
  82
  83         /* H20 : IMGCLKOUT1 ==> WLAN_PERST_L */
  84         PAD_CFG_GPO(GPP_H20, 1, DEEP),
  85 };
  86
  87 const struct pad_config *variant_gpio_override_table(size_t *num)
  88 {
  89         *num = ARRAY_SIZE(override_gpio_table);
  90         return override_gpio_table;
  91 }
  92
  93 const struct pad_config *variant_early_gpio_table(size_t *num)
  94 {
  95         *num = ARRAY_SIZE(early_gpio_table);
  96         return early_gpio_table;
  97 }
  98
  99 const struct pad_config *variant_romstage_gpio_table(size_t *num)
 100 {
 101         *num = ARRAY_SIZE(romstage_gpio_table);
 102         return romstage_gpio_table;
 103 }