mb/google/fatcat/var/fatcat: Refactor GPIO programming for UFS support
[coreboot.git] / src / mainboard / google / brya / variants / riven / variant.c
blob32c1f0aee1f3db83c57f3791ca9c1c17dc8c05fa
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <baseboard/variants.h>
4 #include <boardid.h>
5 #include <fw_config.h>
6 #include <sar.h>
7 #include <stdio.h>
9 const char *get_wifi_sar_cbfs_filename(void)
11 uint64_t type = fw_config_get_field(FW_CONFIG_FIELD(WIFI_TYPE));
12 uint64_t sar_id = fw_config_get_field(FW_CONFIG_FIELD(WIFI_SAR_ID));
13 static char filename[20];
15 if (type == UNDEFINED_FW_CONFIG || sar_id == UNDEFINED_FW_CONFIG) {
16 printk(BIOS_WARNING, "fw_config unprovisioned, set sar filename to NULL\n");
17 return NULL;
20 printk(BIOS_INFO, "Use wifi_sar_%lld.hex.\n", type << 3 | sar_id);
21 if (snprintf(filename, sizeof(filename), "wifi_sar_%lld.hex", type << 3 | sar_id) < 0) {
22 printk(BIOS_ERR, "Error occurred with snprintf, set sar filename to NULL\n");
23 return NULL;
25 return filename;
28 void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config)
30 const uint32_t id = board_id();
31 if (id != BOARD_ID_UNKNOWN && id >= 2) /* proto1 = 0, proto2 = 1 */
32 return;
34 config->ext_fivr_settings.configure_ext_fivr = 1;
35 config->ext_fivr_settings.v1p05_enable_bitmap =
36 FIVR_ENABLE_ALL_SX & ~FIVR_ENABLE_S0;
37 config->ext_fivr_settings.vnn_enable_bitmap =
38 FIVR_ENABLE_ALL_SX;
39 config->ext_fivr_settings.vnn_sx_enable_bitmap =
40 FIVR_ENABLE_ALL_SX;
41 config->ext_fivr_settings.v1p05_supported_voltage_bitmap =
42 FIVR_VOLTAGE_NORMAL;
43 config->ext_fivr_settings.vnn_supported_voltage_bitmap =
44 FIVR_VOLTAGE_MIN_ACTIVE;
45 config->ext_fivr_settings.v1p05_voltage_mv = 1050;
46 config->ext_fivr_settings.vnn_voltage_mv = 780;
47 config->ext_fivr_settings.vnn_sx_voltage_mv = 1050;
48 config->ext_fivr_settings.v1p05_icc_max_ma = 500;
49 config->ext_fivr_settings.vnn_icc_max_ma = 500;
50 printk(BIOS_INFO, "Configured External FIVR\n");