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util/crossgcc/buildgcc: Add riscv64-elf to targets
[coreboot.git] / src / mainboard / google / brya / variants / telith / overridetree.cb
blob202b0ed554bc54dda3c701abcdabff6806a81e31
1 fw_config
2 field WIFI 8 9
3 option UNKNOWN 0
4 option WIFI_6_7921 1
5 option WIFI_6E 2
6 option WIFI_6_8852 3
7 end
8 field CAMERA 10 11
9 option UF_720P_WF 0
10 option UF_1080P 1
11 option UF_720P 2
12 option UF_1080P_WF 3
13 end
14 field THERMAL_SOLUTION 19 19
15 option THERMAL_SOLUTION_6W 0
16 option THERMAL_SOLUTION_15W 1
17 end
18 end
19
20 chip soc/intel/alderlake
21 register "sagv" = "SaGv_Enabled"
22
23 # Acoustic settings
24 register "acoustic_noise_mitigation" = "true"
25 register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_4"
26 register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_4"
27 register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1"
28 register "fast_pkg_c_ramp_disable[VR_DOMAIN_GT]" = "1"
29
30 # EMMC Tx CMD Delay
31 # Refer to EDS-Vol2-42.3.7.
32 # [14:8] steps of delay for DDR mode, each 125ps, range: 0 - 39.
33 # [6:0] steps of delay for SDR mode, each 125ps, range: 0 - 39.
34 register "common_soc_config.emmc_dll.emmc_tx_cmd_cntl" = "0x505"
35
36 # EMMC TX DATA Delay 1
37 # Refer to EDS-Vol2-42.3.8.
38 # [14:8] steps of delay for HS400, each 125ps, range: 0 - 78.
39 # [6:0] steps of delay for SDR104/HS200, each 125ps, range: 0 - 79.
40 register "common_soc_config.emmc_dll.emmc_tx_data_cntl1" = "0x909"
41
42 # EMMC TX DATA Delay 2
43 # Refer to EDS-Vol2-42.3.9.
44 # [30:24] steps of delay for SDR50, each 125ps, range: 0 - 79.
45 # [22:16] steps of delay for DDR50, each 125ps, range: 0 - 78.
46 # [14:8] steps of delay for SDR25/HS50, each 125ps, range: 0 -79.
47 # [6:0] steps of delay for SDR12, each 125ps. Range: 0 - 79.
48 register "common_soc_config.emmc_dll.emmc_tx_data_cntl2" = "0x1C2A2828"
49
50 # EMMC RX CMD/DATA Delay 1
51 # Refer to EDS-Vol2-42.3.10.
52 # [30:24] steps of delay for SDR50, each 125ps, range: 0 - 119.
53 # [22:16] steps of delay for DDR50, each 125ps, range: 0 - 78.
54 # [14:8] steps of delay for SDR25/HS50, each 125ps, range: 0 - 119.
55 # [6:0] steps of delay for SDR12, each 125ps, range: 0 - 119.
56 register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl1" = "0x1C1B4F1B"
57
58 # EMMC RX CMD/DATA Delay 2
59 # Refer to EDS-Vol2-42.3.12.
60 # [17:16] stands for Rx Clock before Output Buffer,
61 # 00: Rx clock after output buffer,
62 # 01: Rx clock before output buffer,
63 # 10: Automatic selection based on working mode.
64 # 11: Reserved
65 # [14:8] steps of delay for Auto Tuning Mode, each 125ps, range: 0 - 39.
66 # [6:0] steps of delay for HS200, each 125ps, range: 0 - 79.
67 register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl2" = "0x1004C"
68
69 # EMMC Rx Strobe Delay
70 # Refer to EDS-Vol2-42.3.11.
71 # [14:8] Rx Strobe Delay DLL 1(HS400 Mode), each 125ps, range: 0 - 39.
72 # [6:0] Rx Strobe Delay DLL 2(HS400 Mode), each 125ps, range: 0 - 39.
73 register "common_soc_config.emmc_dll.emmc_rx_strobe_cntl" = "0x01515"
74
75 # SOC Aux orientation override:
76 # This is a bitfield that corresponds to up to 4 TCSS ports.
77 # Bits (0,1) allocated for TCSS Port1 configuration and Bits (2,3)for TCSS Port2.
78 # TcssAuxOri = 0100b
79 # Bit0 set to "0" indicates has retimer on USBC Port0, on the DB.
80 # Bit2 set to "1" indicates no retimer on USBC Port1, on the MB.
81 # Bit1,Bit3 set to "0" indicates Aux lines are not swapped on the
82 # motherboard to USBC connector
83 register "tcss_aux_ori" = "5"
84
85 register "typec_aux_bias_pads[0]" = "{
86 .pad_auxp_dc = GPP_A19,
87 .pad_auxn_dc = GPP_A20
88 }"
89
90 register "typec_aux_bias_pads[1]" = "{
91 .pad_auxp_dc = GPP_E22,
92 .pad_auxn_dc = GPP_E23
93 }"
94
95 # FIVR configurations for teliks are disabled since the board doesn't have V1p05 and Vnn
96 # bypass rails implemented.
97 register "ext_fivr_settings" = "{
98 .configure_ext_fivr = 0,
99 }"
100
101 # Enable the Cnvi BT Audio Offload
102 register "cnvi_bt_audio_offload" = "1"
103
104 # Intel Common SoC Config
105 #+-------------+------------------------------+
106 #| Field | Value |
107 #+-------------+------------------------------+
108 #| I2C0 | TPM. Early init is |
109 #| | required to set up a BAR |
110 #| | for TPM communication |
111 #| I2C1 | Touchscreen |
112 #| I2C2 | Sub-board(PSensor)/WCAM |
113 #| I2C3 | Audio |
114 #| I2C5 | Trackpad |
115 #+-------------+------------------------------+
116 register "common_soc_config" = "{
117 .i2c[0] = {
118 .early_init = 1,
119 .speed = I2C_SPEED_FAST_PLUS,
120 .speed_config[0] = {
121 .speed = I2C_SPEED_FAST_PLUS,
122 .scl_lcnt = 55,
123 .scl_hcnt = 30,
124 .sda_hold = 7,
125 }
126 },
127 .i2c[1] = {
128 .speed = I2C_SPEED_FAST,
129 .speed_config[0] = {
130 .speed = I2C_SPEED_FAST,
131 .scl_lcnt = 160,
132 .scl_hcnt = 79,
133 .sda_hold = 7,
134 }
135 },
136 .i2c[2] = {
137 .speed = I2C_SPEED_FAST,
138 .speed_config[0] = {
139 .speed = I2C_SPEED_FAST,
140 .scl_lcnt = 157,
141 .scl_hcnt = 79,
142 .sda_hold = 7,
143 }
144 },
145 .i2c[3] = {
146 .speed = I2C_SPEED_FAST,
147 .speed_config[0] = {
148 .speed = I2C_SPEED_FAST,
149 .scl_lcnt = 157,
150 .scl_hcnt = 79,
151 .sda_hold = 7,
152 }
153 },
154 .i2c[5] = {
155 .speed = I2C_SPEED_FAST,
156 .speed_config[0] = {
157 .speed = I2C_SPEED_FAST,
158 .scl_lcnt = 152,
159 .scl_hcnt = 79,
160 .sda_hold = 7,
161 }
162 },
163 }"
164
165 # Power limit config
166 register "power_limits_config[ADL_N_041_6W_CORE]" = "{
167 .tdp_pl1_override = 15,
168 .tdp_pl2_override = 25,
169 .tdp_pl4 = 78,
170 }"
171 register "power_limits_config[ADL_N_081_15W_CORE]" = "{
172 .tdp_pl1_override = 20,
173 .tdp_pl2_override = 35,
174 .tdp_pl4 = 83,
175 }"
176
177 device domain 0 on
178 device ref dtt on
179 chip drivers/intel/dptf
180 ## sensor information
181 register "options.tsr[0].desc" = ""CPU""
182 register "options.tsr[1].desc" = ""5V Regulator""
183 register "options.tsr[2].desc" = ""Ambient""
184 register "options.tsr[3].desc" = ""Charger""
185
186 # TODO: below values are initial reference values only
187 ## Passive Policy
188 register "policies.passive" = "{
189 [0] = DPTF_PASSIVE(CPU, CPU, 85, 6000),
190 [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 85, 6000),
191 [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 85, 6000),
192 [3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 85, 5000),
193 [4] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_3, 85, 6000),
194 }"
195
196 ## Critical Policy
197 register "policies.critical" = "{
198 [0] = DPTF_CRITICAL(TEMP_SENSOR_1, 90, SHUTDOWN),
199 [1] = DPTF_CRITICAL(TEMP_SENSOR_2, 90, SHUTDOWN),
200 }"
201
202 register "controls.power_limits" = "{
203 .pl1 = {
204 .min_power = 6000,
205 .max_power = 15000,
206 .time_window_min = 28 * MSECS_PER_SEC,
207 .time_window_max = 32 * MSECS_PER_SEC,
208 .granularity = 200
209 },
210 .pl2 = {
211 .min_power = 25000,
212 .max_power = 25000,
213 .time_window_min = 28 * MSECS_PER_SEC,
214 .time_window_max = 32 * MSECS_PER_SEC,
215 .granularity = 1000
216 }
217 }"
218
219 ## Charger Performance Control (Control, mA)
220 register "controls.charger_perf" = "{
221 [0] = { 255, 3000 },
222 [1] = { 24, 1500 },
223 [2] = { 16, 1000 },
224 [3] = { 8, 500 }
225 }"
226
227 device generic 0 on
228 probe THERMAL_SOLUTION THERMAL_SOLUTION_6W
229 end
230 end
231
232 chip drivers/intel/dptf
233 ## sensor information
234 register "options.tsr[0].desc" = ""CPU""
235 register "options.tsr[1].desc" = ""5V Regulator""
236 register "options.tsr[2].desc" = ""Ambient""
237 register "options.tsr[3].desc" = ""Charger""
238
239 # TODO: below values are initial reference values only
240 ## Active Policy
241 register "policies.active" = "{
242 [0] = {
243 .target = DPTF_TEMP_SENSOR_0,
244 .thresholds = {
245 TEMP_PCT(73, 100),
246 TEMP_PCT(43, 20),
247 }
248 },
249 [1] = {
250 .target = DPTF_TEMP_SENSOR_1,
251 .thresholds = {
252 TEMP_PCT(60, 100),
253 TEMP_PCT(38, 20),
254 }
255 },
256 [2] = {
257 .target = DPTF_TEMP_SENSOR_2,
258 .thresholds = {
259 TEMP_PCT(58, 100),
260 TEMP_PCT(36, 20),
261 }
262 },
263 [3] = {
264 .target = DPTF_TEMP_SENSOR_3,
265 .thresholds = {
266 TEMP_PCT(72, 100),
267 TEMP_PCT(41, 20),
268 }
269 }
270 }"
271 ## Passive Policy
272 register "policies.passive" = "{
273 [0] = DPTF_PASSIVE(CPU, CPU, 85, 6000),
274 [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 85, 6000),
275 [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 85, 6000),
276 [3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 85, 6000),
277 [4] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_3, 85, 6000),
278 }"
279
280 ## Critical Policy
281 register "policies.critical" = "{
282 [0] = DPTF_CRITICAL(TEMP_SENSOR_1, 90, SHUTDOWN),
283 [1] = DPTF_CRITICAL(TEMP_SENSOR_2, 90, SHUTDOWN),
284 }"
285
286 register "controls.power_limits" = "{
287 .pl1 = {
288 .min_power = 15000,
289 .max_power = 20000,
290 .time_window_min = 28 * MSECS_PER_SEC,
291 .time_window_max = 32 * MSECS_PER_SEC,
292 .granularity = 200
293 },
294 .pl2 = {
295 .min_power = 35000,
296 .max_power = 35000,
297 .time_window_min = 28 * MSECS_PER_SEC,
298 .time_window_max = 32 * MSECS_PER_SEC,
299 .granularity = 1000
300 }
301 }"
302
303 ## Charger Performance Control (Control, mA)
304 register "controls.charger_perf" = "{
305 [0] = { 255, 3000 },
306 [1] = { 24, 2000 },
307 [2] = { 16, 1000 },
308 [3] = { 8, 500 }
309 }"
310
311 ## Fan Performance Control (Percent, Speed, Noise, Power)
312 register "controls.fan_perf" = "{
313 [0] = { 100, 4000, 220, 1640, },
314 [1] = { 90, 3700, 220, 1640, },
315 [2] = { 80, 3500, 180, 1310, },
316 [3] = { 70, 3300, 145, 1030, },
317 [4] = { 60, 3100, 115, 765, },
318 [5] = { 50, 2800, 90, 545, },
319 [6] = { 40, 2500, 55, 365, },
320 [7] = { 30, 2100, 30, 220, },
321 [8] = { 20, 1500, 15, 120, },
322 [9] = { 0, 0, 0, 50, }
323 }"
324
325 ## Fan options
326 register "options.fan.fine_grained_control" = "true"
327 register "options.fan.step_size" = "2"
328 device generic 1 on
329 probe THERMAL_SOLUTION THERMAL_SOLUTION_15W
330 end
331 end
332 end
333 device ref igpu on
334 chip drivers/gfx/generic
335 register "device_count" = "4"
336 # DDIA for eDP
337 register "device[0].name" = ""LCD0""
338 # Internal panel on the first port of the graphics chip
339 register "device[0].type" = "panel"
340 # DDIB for HDMI
341 # If HDMI is not enumerated in the kernel, then no GFX device should be added for DDIB
342 register "device[1].name" = ""DD01""
343 # TCP0 (DP-1) for port C0
344 register "device[2].name" = ""DD02""
345 register "device[2].use_pld" = "true"
346 register "device[2].pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
347 # TCP1 (DP-2) for port C1
348 register "device[3].name" = ""DD03""
349 register "device[3].use_pld" = "true"
350 register "device[3].pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(2, 1))"
351 device generic 0 on end
352 end
353 end
354 device ref ipu on
355 chip drivers/intel/mipi_camera
356 register "acpi_uid" = "0x50000"
357 register "acpi_name" = ""IPU0""
358 register "device_type" = "INTEL_ACPI_CAMERA_CIO2"
359
360 register "cio2_num_ports" = "1"
361 register "cio2_lanes_used" = "{4}" # 4 CSI Camera lanes are used
362 register "cio2_lane_endpoint[0]" = ""^I2C2.CAM0""
363 register "cio2_prt[0]" = "1"
364 device generic 0 on
365 probe CAMERA UF_720P_WF
366 probe CAMERA UF_1080P_WF
367 end
368 end
369 end
370 device ref i2c1 on
371 chip drivers/i2c/generic
372 register "hid" = ""ELAN0001""
373 register "desc" = ""ELAN Touchscreen""
374 register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
375 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
376 register "reset_delay_ms" = "20"
377 register "reset_off_delay_ms" = "4"
378 register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
379 register "stop_delay_ms" = "5"
380 register "stop_off_delay_ms" = "25"
381 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
382 register "enable_delay_ms" = "25"
383 register "has_power_resource" = "true"
384 device i2c 10 on end
385 end
386 end
387 device ref i2c2 on
388 chip drivers/intel/mipi_camera
389 register "acpi_hid" = ""OVTIDB10""
390 register "acpi_uid" = "0"
391 register "acpi_name" = ""CAM0""
392 register "chip_name" = ""Ov 13b10 Camera""
393 register "device_type" = "INTEL_ACPI_CAMERA_SENSOR"
394
395 register "ssdb.lanes_used" = "4"
396 register "ssdb.vcm_type" = "0x0C"
397 register "vcm_name" = ""VCM0""
398 register "num_freq_entries" = "1"
399 register "link_freq[0]" = "560 * MHz"
400 register "remote_name" = ""IPU0""
401
402 register "has_power_resource" = "true"
403 #Controls
404 register "clk_panel.clks[0].clknum" = "IMGCLKOUT_3"
405 register "clk_panel.clks[0].freq" = "FREQ_19_2_MHZ"
406
407 register "gpio_panel.gpio[0].gpio_num" = "GPP_D15" # EN_PP2800_WCAM_X
408 register "gpio_panel.gpio[1].gpio_num" = "GPP_D16" # EN_PP1200_WCAM_X
409 register "gpio_panel.gpio[2].gpio_num" = "GPP_D3" # WCAM_RST_L
410
411 #_ON
412 register "on_seq.ops_cnt" = "5"
413 register "on_seq.ops[0]" = "SEQ_OPS_CLK_ENABLE(0, 0)"
414 register "on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(0, 5)"
415 register "on_seq.ops[2]" = "SEQ_OPS_GPIO_ENABLE(1, 5)"
416 register "on_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(2, 5)"
417 register "on_seq.ops[4]" = "SEQ_OPS_GPIO_ENABLE(2, 5)"
418
419 #_OFF
420 register "off_seq.ops_cnt" = "4"
421 register "off_seq.ops[0]" = "SEQ_OPS_CLK_DISABLE(0, 0)"
422 register "off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(2, 0)"
423 register "off_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(1, 0)"
424 register "off_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
425
426 device i2c 36 on
427 probe CAMERA UF_720P_WF
428 probe CAMERA UF_1080P_WF
429 end
430 end
431 chip drivers/intel/mipi_camera
432 register "acpi_uid" = "2"
433 register "acpi_name" = ""VCM0""
434 register "chip_name" = ""DW9714 VCM ""
435 register "device_type" = "INTEL_ACPI_CAMERA_VCM"
436
437 register "vcm_compat" = ""dongwoon,dw9714""
438
439 register "has_power_resource" = "true"
440 #Controls
441 register "gpio_panel.gpio[0].gpio_num" = "GPP_D15" # EN_PP2800_AFVDD
442
443 #_ON
444 register "on_seq.ops_cnt" = "1"
445 register "on_seq.ops[0]" = "SEQ_OPS_GPIO_ENABLE(0, 5)"
446
447 #_OFF
448 register "off_seq.ops_cnt" = "1"
449 register "off_seq.ops[0]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
450
451 device i2c 0C on
452 probe CAMERA UF_720P_WF
453 probe CAMERA UF_1080P_WF
454 end
455 end
456 chip drivers/intel/mipi_camera
457 register "acpi_uid" = "1"
458 register "acpi_name" = ""NVM0""
459 register "chip_name" = ""GT24P64E""
460 register "device_type" = "INTEL_ACPI_CAMERA_NVM"
461
462 register "nvm_size" = "0x2000"
463 register "nvm_pagesize" = "1"
464 register "nvm_readonly" = "1"
465 register "nvm_width" = "0x10"
466 register "nvm_compat" = ""atmel,24c64""
467
468 device i2c 50 on
469 probe CAMERA UF_720P_WF
470 probe CAMERA UF_1080P_WF
471 end
472 end
473 end
474 device ref i2c3 on
475 chip drivers/i2c/rt5645
476 register "hid" = ""10EC5650""
477 register "name" = ""RT58""
478 register "desc" = ""Realtek RT5650""
479 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
480 register "cbj_sleeve" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
481 register "jd_mode" = "2"
482 device i2c 1a on end
483 end
484 end
485 device ref i2c5 on
486 chip drivers/i2c/hid
487 register "generic.hid" = ""PNP0C50""
488 register "generic.desc" = ""PRIMAX Touchpad""
489 register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
490 register "generic.wake" = "GPE0_DW2_14"
491 register "generic.detect" = "1"
492 register "hid_desc_reg_offset" = "0x01"
493 device i2c 15 on end
494 end
495 end
496 device ref cnvi_wifi on
497 chip drivers/wifi/generic
498 register "wake" = "GPE0_PME_B0"
499 register "enable_cnvi_ddr_rfim" = "true"
500 register "add_acpi_dma_property" = "true"
501 device generic 0 on
502 probe WIFI WIFI_6E
503 end
504 end
505 end
506 device ref pcie_rp4 on
507 # PCIe 4 WLAN
508 register "pch_pcie_rp[PCH_RP(4)]" = "{
509 .clk_src = 2,
510 .clk_req = 2,
511 .flags = PCIE_RP_LTR | PCIE_RP_AER,
512 }"
513 chip drivers/wifi/generic
514 register "wake" = "GPE0_DW1_03"
515 register "add_acpi_dma_property" = "true"
516 device pci 00.0 on
517 probe WIFI WIFI_6_7921
518 probe WIFI WIFI_6_8852
519 end
520 end
521 end
522 device ref pch_espi on
523 chip ec/google/chromeec
524 use conn0 as mux_conn[0]
525 use conn1 as mux_conn[1]
526 device pnp 0c09.0 on end
527 end
528 end
529 device ref pmc hidden
530 chip drivers/intel/pmc_mux
531 device generic 0 on
532 chip drivers/intel/pmc_mux/conn
533 use usb2_port1 as usb2_port
534 use tcss_usb3_port2 as usb3_port
535 device generic 0 alias conn0 on end
536 end
537 chip drivers/intel/pmc_mux/conn
538 use usb2_port2 as usb2_port
539 use tcss_usb3_port1 as usb3_port
540 device generic 1 alias conn1 on end
541 end
542 end
543 end
544 end
545 device ref tcss_xhci on
546 chip drivers/usb/acpi
547 device ref tcss_root_hub on
548 chip drivers/usb/acpi
549 register "desc" = ""USB3 Type-C Port C0 (MLB)""
550 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
551 register "use_custom_pld" = "true"
552 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
553 device ref tcss_usb3_port2 on end
554 end
555 chip drivers/usb/acpi
556 register "desc" = ""USB3 Type-C Port C1 (MLB)""
557 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
558 register "use_custom_pld" = "true"
559 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(2, 1))"
560 device ref tcss_usb3_port1 on end
561 end
562 end
563 end
564 end
565 device ref xhci on
566 register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type-C MB (7.5 inch)
567 register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type-C DB (7.1 inch)
568 register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # Type-A MB (6.4 inch)
569 register "usb2_ports[5]" = "USB2_PORT_SHORT(OC_SKIP)" # UFC (3.7 inch)
570 register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for PCIe WLAN (2.5 inch)
571 register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for CNVi WLAN
572
573 register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3 Type-A port A0(MLB))
574 chip drivers/usb/acpi
575 device ref xhci_root_hub on
576 chip drivers/usb/acpi
577 register "desc" = ""USB2 Type-C Port C0 (MLB)""
578 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
579 register "use_custom_pld" = "true"
580 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
581 device ref usb2_port1 on end
582 end
583 chip drivers/usb/acpi
584 register "desc" = ""USB2 Type-C Port C1 (MLB)""
585 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
586 register "use_custom_pld" = "true"
587 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(2, 1))"
588 device ref usb2_port2 on end
589 end
590 chip drivers/usb/acpi
591 register "desc" = ""USB2 Type-A Port A0 (MLB)""
592 register "type" = "UPC_TYPE_A"
593 register "use_custom_pld" = "true"
594 register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, CENTER, ACPI_PLD_GROUP(3, 1))"
595 device ref usb2_port3 on end
596 end
597 chip drivers/usb/acpi
598 register "desc" = ""USB2 UFC""
599 register "type" = "UPC_TYPE_INTERNAL"
600 device ref usb2_port6 on end
601 end
602 chip drivers/usb/acpi
603 register "desc" = ""PCIe Bluetooth""
604 register "type" = "UPC_TYPE_INTERNAL"
605 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
606 device ref usb2_port8 on
607 probe WIFI WIFI_6_7921
608 probe WIFI WIFI_6_8852
609 end
610 end
611 chip drivers/usb/acpi
612 register "desc" = ""CNVi Bluetooth""
613 register "type" = "UPC_TYPE_INTERNAL"
614 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
615 device ref usb2_port10 on
616 probe WIFI WIFI_6E
617 end
618 end
619 chip drivers/usb/acpi
620 register "desc" = ""USB3 Type-A Port A0 (MLB)""
621 register "type" = "UPC_TYPE_USB3_A"
622 register "use_custom_pld" = "true"
623 register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, CENTER, ACPI_PLD_GROUP(3, 1))"
624 device ref usb3_port1 on end
625 end
626 chip drivers/usb/acpi
627 register "desc" = ""USB3 WLAN""
628 register "type" = "UPC_TYPE_INTERNAL"
629 device ref usb3_port4 on end
630 end
631 end
632 end
633 end
634 device ref pcie_rp7 off end # SDCard
635 device ref hda on
636 chip drivers/sof
637 register "spkr_tplg" = "rt5650_sp"
638 register "jack_tplg" = "rt5650_hp"
639 register "mic_tplg" = "_2ch_pdm0"
640 device generic 0 on end
641 end
642 end
643 end
644 end
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