src/mainboard/google/brya/variants/uldrenite/hda_verb.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <device/azalia_device.h>
   4
   5 const u32 cim_verb_data[] = {
   6         /* coreboot specific header */
   7         0x10ec0236,     // Codec Vendor ID: Realtek ALC3204
   8         0x10280D76,     // Subsystem ID
   9         0x00000021,     // Number of jacks (NID entries)
  10
  11         AZALIA_RESET(0x1),
  12         /* NID 0x01, HDA Codec Subsystem ID Verb table */
  13         AZALIA_SUBVENDOR(0, 0x10280D76),
  14
  15         /* Pin Widget Verb Table */
  16         /*
  17          * DMIC
  18          * Requirement is to use PCH DMIC. Hence,
  19          * commented out codec's Internal DMIC.
  20          * AZALIA_PIN_CFG(0, 0x12, 0x90A60130),
  21          * AZALIA_PIN_CFG(0, 0x13, 0x40000000),
  22          */
  23         AZALIA_PIN_CFG(0, 0x12, 0x90a60140),
  24         AZALIA_PIN_CFG(0, 0x13, 0x40000000),
  25         AZALIA_PIN_CFG(0, 0x14, 0x90170110),
  26         AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
  27         AZALIA_PIN_CFG(0, 0x19, 0x00a11030),
  28         AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
  29         AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
  30         AZALIA_PIN_CFG(0, 0x1d, 0x40700001),
  31         AZALIA_PIN_CFG(0, 0x1e, 0x421212f2),
  32         AZALIA_PIN_CFG(0, 0x21, 0x00211020),
  33
  34         /* RESET to D0 */
  35         0x00170500,
  36         0x00170500,
  37         0x00170500,
  38         0x00170500,
  39         /* RESET Register */
  40         0x0205001A,
  41         0x02048003,
  42         0x0205001A,
  43         0x0204C003,
  44         /* ALC3204 default-1(Class D RESET) */
  45         0x0205003C,
  46         0x02040354,
  47         0x0205003C,
  48         0x02040314,
  49         /* ALC3204 default-2 (Tco) */
  50         0x02050040,
  51         0x02049800,
  52         0x02050034,
  53         0x0204023C,
  54         /* ALC3204 Speaker output power - 4 ohm
  55          * 2W (+12dB gain) + Combo Jack TRS setting
  56          */
  57         0x02050038,
  58         0x02043901,
  59         0x02050045,
  60         0x02045089,
  61         /* H/W AGC setting-1 */
  62         0x02050016,
  63         0x02040C50,
  64         0x02050012,
  65         0x0204EBC2,
  66         /* H/W AGC setting-2 */
  67         0x02050013,
  68         0x0204401D,
  69         0x02050016,
  70         0x02044E50,
  71         /* Zero data  + EAPD to verb-control */
  72         0x02050037,
  73         0x0204FE15,
  74         0x02050010,
  75         0x02040020,
  76         /* Zero data */
  77         0x02050030,
  78         0x02048000,
  79         0x02050030,
  80         0x02048000,
  81         /* ALC3204 default-3 */
  82         0x05750003,
  83         0x05740DA3,
  84         0x02050046,
  85         0x02040004,
  86         /* ALC3204 default-4 */
  87         0x0205001B,
  88         0x02040A4B,
  89         0x02050008,
  90         0x02046A4C,
  91         /* JD1 */
  92         0x02050009,
  93         0x0204E003,
  94         0x0205000A,
  95         0x02047770,
  96         /* JD2 */
  97         0x0205000B,
  98         0x02047778,
  99         0x0205000B,
 100         0x02047778,
 101         /* Microphone + Array MIC  security Disable  +ADC clock Enable */
 102         0x0205000D,
 103         0x0204A020,
 104         0x02050005,
 105         0x02040700,
 106         /* Speaker Enable */
 107         0x0205000C,
 108         0x020401EF,
 109         0x0205000C,
 110         0x020401EF,
 111         /* EQ Bypass + EQ HPF cutoff 250Hz */
 112         0x05350000,
 113         0x0534201A,
 114         0x0535001d,
 115         0x05340800,
 116         /* EQ-2 */
 117         0x0535001e,
 118         0x05340800,
 119         0x05350003,
 120         0x05341EF8,
 121         /* EQ-3 */
 122         0x05350004,
 123         0x05340000,
 124         0x05450000,
 125         0x05442000,
 126         /* EQ-4 */
 127         0x0545001d,
 128         0x05440800,
 129         0x0545001e,
 130         0x05440800,
 131         /* EQ-5 */
 132         0x05450003,
 133         0x05441EF8,
 134         0x05450004,
 135         0x05440000,
 136         /* EQ Update */
 137         0x05350000,
 138         0x0534E01A,
 139         0x05350000,
 140         0x0534E01A,
 141 };
 142
 143 const u32 pc_beep_verbs[] = {
 144         /* PCBeep pass through to NID14 for ePSA test-1 */
 145         0x02050036,
 146         0x02047717,
 147         0x02050036,
 148         0x02047717,
 149         /* PCBeep pass through to NID14 for ePSA test-2 */
 150         0x01470740,
 151         0x0143B000,
 152         0x01470C02,
 153         0x01470C02,
 154 };
 155
 156 AZALIA_ARRAY_SIZES;